/dports/databases/libiodbc/iODBC-3.52.15/iodbc/trace/ |
H A D | Info.c | 101 #define I_MASK(T) case T: \ macro 1441 I_MASK (SQL_ALTER_TABLE); in _trace_getinfo() 1461 I_MASK (SQL_LOCK_TYPES); in _trace_getinfo() 1519 I_MASK (SQL_SUBQUERIES); in _trace_getinfo() 1525 I_MASK (SQL_UNION); in _trace_getinfo() 1580 I_MASK (SQL_CREATE_VIEW); in _trace_getinfo() 1586 I_MASK (SQL_DDL_INDEX); in _trace_getinfo() 1600 I_MASK (SQL_DROP_DOMAIN); in _trace_getinfo() 1602 I_MASK (SQL_DROP_SCHEMA); in _trace_getinfo() 1604 I_MASK (SQL_DROP_TABLE); in _trace_getinfo() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/arm7/ |
H A D | arm7core.hxx | 120 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 136 set_cpsr(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */ in arm7_check_irq_state() 145 if (m_pendingIrq && (cpsr & I_MASK) == 0) in arm7_check_irq_state() 152 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 175 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 199 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 224 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state()
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/arm7/ |
H A D | arm7core.hxx | 120 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 136 set_cpsr(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */ in arm7_check_irq_state() 145 if (m_pendingIrq && (cpsr & I_MASK) == 0) in arm7_check_irq_state() 152 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 175 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 199 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 224 set_cpsr(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state()
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/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/ic/ |
H A D | isacsx.c | 506 ISAC_WRITE(I_MASK, 0xff); in isic_isacsx_l1_cmd() 511 ISAC_WRITE(I_MASK, isacsx_imask); in isic_isacsx_l1_cmd() 565 ISAC_WRITE(I_MASK, isacsx_imask); in isic_isacsx_init() 614 ISAC_WRITE(I_MASK, isacsx_imask); in isic_isacsx_init() 630 ISAC_WRITE(I_MASK, isacsx_imask); in isic_isacsx_disable_intr() 671 ISAC_WRITE(I_MASK, 0xff); in isic_isacsx_recover() 674 ISAC_WRITE(I_MASK, isacsx_imask); in isic_isacsx_recover()
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H A D | isac.c | 498 ISAC_WRITE(I_MASK, 0xff); in isic_isac_l1_cmd() 502 ISAC_WRITE(I_MASK, ISAC_IMASK); in isic_isac_l1_cmd() 557 ISAC_WRITE(I_MASK, ISAC_IMASK); in isic_isac_init() 661 ISAC_WRITE(I_MASK, ISAC_IMASK); in isic_isac_init() 723 ISAC_WRITE(I_MASK, 0xff); in isic_recover() 725 ISAC_WRITE(I_MASK, ISAC_IMASK); in isic_recover()
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H A D | isic.c | 146 ISAC_WRITE(I_MASK, 0xff); in isicintr() 157 ISAC_WRITE(I_MASK, ISAC_IMASK); in isicintr()
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/dports/devel/gdb/gdb-11.1/gdb/nat/ |
H A D | mips-linux-watch.h | 85 #define I_MASK (1 << I_BIT) macro 87 #define IRW_MASK (I_MASK | R_MASK | W_MASK)
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/dports/devel/dev86/dev86-0.16.20/ld/ |
H A D | dumps.c | 58 if (((flags = symptr->flags) & (C_MASK | I_MASK)) == I_MASK) in dumpsyms()
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H A D | writebin.c | 215 if (!(symptr->flags & (I_MASK | SA_MASK))) 235 if (!reloc_output || !(symptr->flags & I_MASK)) 357 if (!reloc_output || !(symptr->flags & I_MASK)) 364 if (!reloc_output || !(symptr->flags & I_MASK)) 489 else if (flags & (E_MASK | I_MASK)) 493 if (!(flags & I_MASK) || ( 775 if (!reloc_output || !(symptr->flags & I_MASK)) 797 if (symptr->flags & I_MASK) 874 if (symptr->flags != (I_MASK | curseg) || symptr->value != 0)
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H A D | obj.h | 44 #define I_MASK 0x0040 /* imported */ macro
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H A D | writex86.c | 184 if (!(symptr->flags & (I_MASK | SA_MASK))) 398 else if (flags & (E_MASK | I_MASK)) 402 if (!(flags & I_MASK) || 606 if (symptr->flags != (I_MASK | curseg) || symptr->value != 0)
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/e132xs/ |
H A D | 32xsdefs.h | 164 #define I_MASK 0x00000080 macro 186 #define GET_I ((SR & I_MASK)>>7) // bit 7 //INTERRUPT-MODE 204 #define SET_I(val) (SR = (SR & ~I_MASK) | ((val) << 7))
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/e132xs/ |
H A D | 32xsdefs.h | 164 #define I_MASK 0x00000080 macro 186 #define GET_I ((SR & I_MASK)>>7) // bit 7 //INTERRUPT-MODE 204 #define SET_I(val) (SR = (SR & ~I_MASK) | ((val) << 7))
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/dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/arm7/ |
H A D | arm7core.c | 562 SET_CPSR(GET_CPSR | I_MASK | F_MASK | 0x10); in arm7_core_reset() 592 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 605 SET_CPSR(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */ in arm7_check_irq_state() 613 if (ARM7.pendingIrq && (cpsr & I_MASK) == 0) { in arm7_check_irq_state() 617 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 629 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 642 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 663 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state()
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/dports/games/libretro-fbalpha/fbalpha-84eb9d9/src/cpu/arm7/ |
H A D | arm7core.c | 562 SET_CPSR(GET_CPSR | I_MASK | F_MASK | 0x10); in arm7_core_reset() 592 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 605 SET_CPSR(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */ in arm7_check_irq_state() 613 if (ARM7.pendingIrq && (cpsr & I_MASK) == 0) { in arm7_check_irq_state() 617 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 629 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 642 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state() 663 SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */ in arm7_check_irq_state()
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/arm/ |
H A D | arm.cpp | 100 #define I_MASK ((uint32_t)(1<<I_BIT)) /* Interrupt request disable */ macro 107 #define I_IS_SET(pc) ((pc) & I_MASK) 333 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in device_reset() 433 R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK); in execute_run() 465 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set P… in arm_check_irq_state() 470 if (m_pendingIrq && (pc&I_MASK)==0) in arm_check_irq_state() 474 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=… in arm_check_irq_state() 562 (m_sArmRegister[15] & I_MASK) ? 'I' : '-', in state_string_export()
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/arm/ |
H A D | arm.cpp | 100 #define I_MASK ((uint32_t)(1<<I_BIT)) /* Interrupt request disable */ macro 107 #define I_IS_SET(pc) ((pc) & I_MASK) 333 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in device_reset() 433 R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK); in execute_run() 465 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set P… in arm_check_irq_state() 470 if (m_pendingIrq && (pc&I_MASK)==0) in arm_check_irq_state() 474 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=… in arm_check_irq_state() 562 (m_sArmRegister[15] & I_MASK) ? 'I' : '-', in state_string_export()
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/dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/arm/ |
H A D | arm.cpp | 118 #define I_MASK ((UINT32)(1<<I_BIT)) /* Interrupt request disable */ macro 125 #define I_IS_SET(pc) ((pc) & I_MASK) 329 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in ArmReset() 430 R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK); in ArmRun() 471 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set P… in arm_check_irq_state() 476 if (arm.pendingIrq && (pc&I_MASK)==0) { in arm_check_irq_state() 479 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=… in arm_check_irq_state()
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/dports/games/libretro-fbalpha/fbalpha-84eb9d9/src/cpu/arm/ |
H A D | arm.cpp | 118 #define I_MASK ((UINT32)(1<<I_BIT)) /* Interrupt request disable */ macro 125 #define I_IS_SET(pc) ((pc) & I_MASK) 329 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in ArmReset() 427 R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK); in ArmRun() 463 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set P… in arm_check_irq_state() 468 if (arm.pendingIrq && (pc&I_MASK)==0) { in arm_check_irq_state() 471 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=… in arm_check_irq_state()
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/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/pcmcia/ |
H A D | isic_pcmcia_elsa_isdnmc.c | 109 ISAC_WRITE(I_MASK, 0xff); in elsa_isdnmc_clrirq() 112 ISAC_WRITE(I_MASK, ISAC_IMASK); in elsa_isdnmc_clrirq()
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/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/arm/ |
H A D | arm.c | 99 #define I_MASK ((data32_t)(1<<I_BIT)) /* Interrupt request disable */ macro 106 #define I_IS_SET(pc) ((pc) & I_MASK) 297 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in arm_reset() 542 R15 = (pc&PSR_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set PC=0x1c */ in arm_check_irq_state() 546 if (arm.pendingIrq && (pc&I_MASK)==0) { in arm_check_irq_state() 549 R15 = (pc&PSR_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=0x18 */ in arm_check_irq_state() 661 (pRegs->sArmRegister[15] & I_MASK) ? 'I' : '-', in arm_info()
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/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/arm/ |
H A D | arm.c | 100 #define I_MASK ((data32_t)(1<<I_BIT)) /* Interrupt request disable */ macro 107 #define I_IS_SET(pc) ((pc) & I_MASK) 302 R15 = eARM_MODE_SVC|I_MASK|F_MASK; in arm_reset() 409 R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK); in arm_execute() 554 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set P… in arm_check_irq_state() 559 if (arm.pendingIrq && (pc&I_MASK)==0) { in arm_check_irq_state() 562 …R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=… in arm_check_irq_state() 675 (pRegs->sArmRegister[15] & I_MASK) ? 'I' : '-', in arm_info()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/bedbug/ |
H A D | tables.h | 95 { I_OPCODE(18,0,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 97 { I_OPCODE(18,0,1), I_MASK, {O_LI, O_AA, O_LK, 0}, 99 { I_OPCODE(18,1,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 101 { I_OPCODE(18,1,1), I_MASK, {O_LI, O_AA, O_LK, 0},
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/bedbug/ |
H A D | tables.h | 95 { I_OPCODE(18,0,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 97 { I_OPCODE(18,0,1), I_MASK, {O_LI, O_AA, O_LK, 0}, 99 { I_OPCODE(18,1,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 101 { I_OPCODE(18,1,1), I_MASK, {O_LI, O_AA, O_LK, 0},
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/bedbug/ |
H A D | tables.h | 95 { I_OPCODE(18,0,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 97 { I_OPCODE(18,0,1), I_MASK, {O_LI, O_AA, O_LK, 0}, 99 { I_OPCODE(18,1,0), I_MASK, {O_LI, O_AA, O_LK, 0}, 101 { I_OPCODE(18,1,1), I_MASK, {O_LI, O_AA, O_LK, 0},
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