| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 85 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
87 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 85 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
87 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 85 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
87 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 85 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
87 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 84 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
86 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/sysutils/u-boot-tools/u-boot-2020.07/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 87 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
89 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/freescale/mx53ard/ |
| H A D | mx53ard.c | 85 reg = __raw_readl(M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
87 __raw_writel(reg, M4IF_BASE_ADDR + 0xc); in setup_iomux_nand()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-mx51/ |
| H A D | imx-regs.h | 120 #define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/denx/m53evk/ |
| H A D | m53evk.c | 343 setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM_MASK); in m53_set_nand()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/mx51/ |
| H A D | lowlevel_init.S | 76 ldr r0, =M4IF_BASE_ADDR
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/menlo/m53menlo/ |
| H A D | m53menlo.c | 454 setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM_MASK); in m53_set_nand()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/menlo/m53menlo/ |
| H A D | m53menlo.c | 454 setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM_MASK); in m53_set_nand()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/menlo/m53menlo/ |
| H A D | m53menlo.c | 454 setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM_MASK); in m53_set_nand()
|