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Searched refs:MO_RDT (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp177 { "sll", "d,i5", MIPS_SPECIAL(0x00), MA_MIPS1, MO_RDT },
180 { "srl", "d,i5", MIPS_SPECIAL(0x02), MA_MIPS1, MO_RDT },
182 { "rotr", "d,i5", MIPS_SPECIAL(0x02)|MIPS_RS(1), MA_PSP, MO_RDT },
184 { "sra", "d,i5", MIPS_SPECIAL(0x03), MA_MIPS1, MO_RDT },
186 { "sllv", "d,s", MIPS_SPECIAL(0x04), MA_MIPS1, MO_RDT },
188 { "srlv", "d,s", MIPS_SPECIAL(0x06), MA_MIPS1, MO_RDT },
190 { "rotrv", "d,s", MIPS_SPECIAL(0x06)|MIPS_SA(1), MA_PSP, MO_RDT },
192 { "srav", "d,s", MIPS_SPECIAL(0x07), MA_MIPS1, MO_RDT },
208 { "dsllv", "d,s", MIPS_SPECIAL(0x14), MA_MIPS3, MO_64BIT|MO_RDT },
263 { "sgt", "d,s", MIPS_SPECIAL(0x2A), MA_MIPS1, MO_RDT},
[all …]
H A DMipsOpcodes.h23 #define MO_RDT 0x00000010 // rd = rt macro
H A DMipsParser.cpp1198 if (opcode.flags & MO_RDT) in setOmittedRegisters()
/dports/emulators/ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp177 { "sll", "d,i5", MIPS_SPECIAL(0x00), MA_MIPS1, MO_RDT },
180 { "srl", "d,i5", MIPS_SPECIAL(0x02), MA_MIPS1, MO_RDT },
182 { "rotr", "d,i5", MIPS_SPECIAL(0x02)|MIPS_RS(1), MA_PSP, MO_RDT },
184 { "sra", "d,i5", MIPS_SPECIAL(0x03), MA_MIPS1, MO_RDT },
186 { "sllv", "d,s", MIPS_SPECIAL(0x04), MA_MIPS1, MO_RDT },
188 { "srlv", "d,s", MIPS_SPECIAL(0x06), MA_MIPS1, MO_RDT },
190 { "rotrv", "d,s", MIPS_SPECIAL(0x06)|MIPS_SA(1), MA_PSP, MO_RDT },
192 { "srav", "d,s", MIPS_SPECIAL(0x07), MA_MIPS1, MO_RDT },
208 { "dsllv", "d,s", MIPS_SPECIAL(0x14), MA_MIPS3, MO_64BIT|MO_RDT },
263 { "sgt", "d,s", MIPS_SPECIAL(0x2A), MA_MIPS1, MO_RDT},
[all …]
H A DMipsOpcodes.h23 #define MO_RDT 0x00000010 // rd = rt macro
H A DMipsParser.cpp1198 if (opcode.flags & MO_RDT) in setOmittedRegisters()
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp177 { "sll", "d,i5", MIPS_SPECIAL(0x00), MA_MIPS1, MO_RDT },
180 { "srl", "d,i5", MIPS_SPECIAL(0x02), MA_MIPS1, MO_RDT },
182 { "rotr", "d,i5", MIPS_SPECIAL(0x02)|MIPS_RS(1), MA_PSP, MO_RDT },
184 { "sra", "d,i5", MIPS_SPECIAL(0x03), MA_MIPS1, MO_RDT },
186 { "sllv", "d,s", MIPS_SPECIAL(0x04), MA_MIPS1, MO_RDT },
188 { "srlv", "d,s", MIPS_SPECIAL(0x06), MA_MIPS1, MO_RDT },
190 { "rotrv", "d,s", MIPS_SPECIAL(0x06)|MIPS_SA(1), MA_PSP, MO_RDT },
192 { "srav", "d,s", MIPS_SPECIAL(0x07), MA_MIPS1, MO_RDT },
208 { "dsllv", "d,s", MIPS_SPECIAL(0x14), MA_MIPS3, MO_64BIT|MO_RDT },
263 { "sgt", "d,s", MIPS_SPECIAL(0x2A), MA_MIPS1, MO_RDT},
[all …]
H A DMipsOpcodes.h23 #define MO_RDT 0x00000010 // rd = rt macro
H A DMipsParser.cpp1198 if (opcode.flags & MO_RDT) in setOmittedRegisters()