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Searched refs:MO_RST (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp29 { "addi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST },
31 { "subi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST|MO_NEGIMM },
33 { "addiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST },
35 { "subiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST|MO_NEGIMM },
37 { "slti", "s,i16", MIPS_OP(0x0A), MA_MIPS1, MO_RST },
39 { "sltiu", "s,i16", MIPS_OP(0x0B), MA_MIPS1, MO_RST },
41 { "andi", "s,i16", MIPS_OP(0x0C), MA_MIPS1, MO_RST },
43 { "ori", "s,i16", MIPS_OP(0x0D), MA_MIPS1, MO_RST },
45 { "xori", "s,i16", MIPS_OP(0x0E), MA_MIPS1, MO_RST },
55 { "daddi", "s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT|MO_RST },
[all …]
H A DMipsOpcodes.h22 #define MO_RST 0x00000008 // rs = rt macro
H A DMipsParser.cpp1195 if (opcode.flags & MO_RST) in setOmittedRegisters()
/dports/emulators/ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp29 { "addi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST },
31 { "subi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST|MO_NEGIMM },
33 { "addiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST },
35 { "subiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST|MO_NEGIMM },
37 { "slti", "s,i16", MIPS_OP(0x0A), MA_MIPS1, MO_RST },
39 { "sltiu", "s,i16", MIPS_OP(0x0B), MA_MIPS1, MO_RST },
41 { "andi", "s,i16", MIPS_OP(0x0C), MA_MIPS1, MO_RST },
43 { "ori", "s,i16", MIPS_OP(0x0D), MA_MIPS1, MO_RST },
45 { "xori", "s,i16", MIPS_OP(0x0E), MA_MIPS1, MO_RST },
55 { "daddi", "s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT|MO_RST },
[all …]
H A DMipsOpcodes.h22 #define MO_RST 0x00000008 // rs = rt macro
H A DMipsParser.cpp1195 if (opcode.flags & MO_RST) in setOmittedRegisters()
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/
H A DMipsOpcodes.cpp29 { "addi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST },
31 { "subi", "s,i16", MIPS_OP(0x08), MA_MIPS1, MO_RST|MO_NEGIMM },
33 { "addiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST },
35 { "subiu", "s,i16", MIPS_OP(0x09), MA_MIPS1, MO_RST|MO_NEGIMM },
37 { "slti", "s,i16", MIPS_OP(0x0A), MA_MIPS1, MO_RST },
39 { "sltiu", "s,i16", MIPS_OP(0x0B), MA_MIPS1, MO_RST },
41 { "andi", "s,i16", MIPS_OP(0x0C), MA_MIPS1, MO_RST },
43 { "ori", "s,i16", MIPS_OP(0x0D), MA_MIPS1, MO_RST },
45 { "xori", "s,i16", MIPS_OP(0x0E), MA_MIPS1, MO_RST },
55 { "daddi", "s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT|MO_RST },
[all …]
H A DMipsOpcodes.h22 #define MO_RST 0x00000008 // rs = rt macro
H A DMipsParser.cpp1195 if (opcode.flags & MO_RST) in setOmittedRegisters()