| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1346 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1387 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1431 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1440 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 5971 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
7548 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1315 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1356 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1400 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1409 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 5907 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
7518 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
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| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1317 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) {
1358 NV = NarrowVector(NV, *CurDAG);
1402 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg);
1411 NV = NarrowVector(NV, *CurDAG);
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| H A D | AArch64ISelLowering.cpp | 5686 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
7285 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
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| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1403 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1444 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1488 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1497 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 6526 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
8180 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1403 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1444 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1488 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1497 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 6526 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
8180 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1403 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1444 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1488 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1497 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 6526 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
8180 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1584 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1625 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1669 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1678 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1571 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1612 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1656 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1665 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 6940 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
8676 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1670 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1723 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1587 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1628 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1672 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1681 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1578 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1619 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1663 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1672 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 6961 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
8697 return NarrowVector(Node, DAG); in LowerINSERT_VECTOR_ELT()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1670 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1723 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1670 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1723 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1670 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1723 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1670 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1723 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1587 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector() function
1628 NV = NarrowVector(NV, *CurDAG); in SelectLoadLane()
1672 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1681 NV = NarrowVector(NV, *CurDAG); in SelectPostLoadLane()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1629 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) {
1670 NV = NarrowVector(NV, *CurDAG);
1714 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg);
1723 NV = NarrowVector(NV, *CurDAG);
|