| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1545 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1550 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1553 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1556 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1559 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1562 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1565 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1568 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1575 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1799 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1804 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1807 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1810 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1813 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1816 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1819 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1822 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1828 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1799 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1804 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1807 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1810 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1813 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1816 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1819 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1822 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1828 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1774 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1779 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1782 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1785 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1788 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1791 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1794 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1797 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1804 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1799 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1804 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1807 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1810 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1813 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1816 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1819 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1822 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1828 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1799 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1804 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1807 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1810 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1813 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1816 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1819 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1822 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1828 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1774 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1779 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1782 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1785 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1788 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1791 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1794 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1797 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1804 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1799 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1804 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1807 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1810 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1813 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1816 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1819 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1822 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1828 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1815 unsigned NegOpc = 0; in selectVectorAshrLshr() local
1820 NegOpc = AArch64::NEGv2i64; in selectVectorAshrLshr()
1823 NegOpc = AArch64::NEGv4i32; in selectVectorAshrLshr()
1826 NegOpc = AArch64::NEGv2i32; in selectVectorAshrLshr()
1829 NegOpc = AArch64::NEGv4i16; in selectVectorAshrLshr()
1832 NegOpc = AArch64::NEGv8i16; in selectVectorAshrLshr()
1835 NegOpc = AArch64::NEGv16i8; in selectVectorAshrLshr()
1838 NegOpc = AArch64::NEGv8i8; in selectVectorAshrLshr()
1844 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorAshrLshr()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1151 unsigned NegOpc = 0; in selectVectorASHR() local
1155 NegOpc = AArch64::NEGv2i64; in selectVectorASHR()
1159 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
1163 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1171 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| H A D | AArch64ISelDAGToDAG.cpp | 2612 unsigned NegOpc; in tryShiftAmountMod() local
2616 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2620 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2626 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1151 unsigned NegOpc = 0; in selectVectorASHR() local
1155 NegOpc = AArch64::NEGv2i64; in selectVectorASHR()
1159 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
1163 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1171 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| H A D | AArch64ISelDAGToDAG.cpp | 2612 unsigned NegOpc; in tryShiftAmountMod() local
2616 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2620 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2626 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1151 unsigned NegOpc = 0; in selectVectorASHR() local
1155 NegOpc = AArch64::NEGv2i64; in selectVectorASHR()
1159 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
1163 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1171 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| H A D | AArch64ISelDAGToDAG.cpp | 2612 unsigned NegOpc; in tryShiftAmountMod() local
2616 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2620 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2626 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 990 unsigned NegOpc = 0; in selectVectorASHR() local
994 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
998 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1006 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| H A D | AArch64ISelDAGToDAG.cpp | 2526 unsigned NegOpc; in tryShiftAmountMod() local
2530 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2534 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2540 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1475 unsigned NegOpc = 0; in selectVectorASHR() local
1479 NegOpc = AArch64::NEGv2i64; in selectVectorASHR()
1483 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
1487 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1495 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1476 unsigned NegOpc = 0; in selectVectorASHR() local
1480 NegOpc = AArch64::NEGv2i64; in selectVectorASHR()
1484 NegOpc = AArch64::NEGv4i32; in selectVectorASHR()
1488 NegOpc = AArch64::NEGv2i32; in selectVectorASHR()
1496 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2495 unsigned NegOpc; in tryShiftAmountMod() local
2499 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2503 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2509 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2502 unsigned NegOpc;
2506 NegOpc = AArch64::SUBWrr;
2510 NegOpc = AArch64::SUBXrr;
2516 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1);
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2793 unsigned NegOpc; in tryShiftAmountMod() local
2797 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2801 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2807 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2780 unsigned NegOpc; in tryShiftAmountMod() local
2784 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2788 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2794 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2838 unsigned NegOpc; in tryShiftAmountMod() local
2842 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2846 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2852 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2796 unsigned NegOpc; in tryShiftAmountMod() local
2800 NegOpc = AArch64::SUBWrr; in tryShiftAmountMod()
2804 NegOpc = AArch64::SUBXrr; in tryShiftAmountMod()
2810 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
|