| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1243 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1254 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1257 NextReg += 4; in emitAlignedDPRCS2Spills()
1273 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1276 NextReg += 4; in emitAlignedDPRCS2Spills()
1290 NextReg += 2; in emitAlignedDPRCS2Spills()
1296 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1299 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1388 NextReg += 4; in emitAlignedDPRCS2Restores()
1405 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1236 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1247 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1250 NextReg += 4; in emitAlignedDPRCS2Spills()
1266 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1269 NextReg += 4; in emitAlignedDPRCS2Spills()
1283 NextReg += 2; in emitAlignedDPRCS2Spills()
1289 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1292 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1381 NextReg += 4; in emitAlignedDPRCS2Restores()
1398 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1242 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1253 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1256 NextReg += 4; in emitAlignedDPRCS2Spills()
1272 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1275 NextReg += 4; in emitAlignedDPRCS2Spills()
1289 NextReg += 2; in emitAlignedDPRCS2Spills()
1295 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1298 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1387 NextReg += 4; in emitAlignedDPRCS2Restores()
1404 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1236 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1247 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1250 NextReg += 4; in emitAlignedDPRCS2Spills()
1266 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1269 NextReg += 4; in emitAlignedDPRCS2Spills()
1283 NextReg += 2; in emitAlignedDPRCS2Spills()
1289 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1292 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1381 NextReg += 4; in emitAlignedDPRCS2Restores()
1398 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1391 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1394 NextReg += 4; in emitAlignedDPRCS2Spills()
1410 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1413 NextReg += 4; in emitAlignedDPRCS2Spills()
1427 NextReg += 2; in emitAlignedDPRCS2Spills()
1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1436 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1525 NextReg += 4; in emitAlignedDPRCS2Restores()
1542 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1391 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1394 NextReg += 4; in emitAlignedDPRCS2Spills()
1410 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1413 NextReg += 4; in emitAlignedDPRCS2Spills()
1427 NextReg += 2; in emitAlignedDPRCS2Spills()
1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1436 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1525 NextReg += 4; in emitAlignedDPRCS2Restores()
1542 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1243 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1254 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1257 NextReg += 4; in emitAlignedDPRCS2Spills()
1273 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1276 NextReg += 4; in emitAlignedDPRCS2Spills()
1290 NextReg += 2; in emitAlignedDPRCS2Spills()
1296 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1299 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1388 NextReg += 4; in emitAlignedDPRCS2Restores()
1405 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1242 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1253 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1256 NextReg += 4; in emitAlignedDPRCS2Spills()
1272 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1275 NextReg += 4; in emitAlignedDPRCS2Spills()
1289 NextReg += 2; in emitAlignedDPRCS2Spills()
1295 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1298 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1387 NextReg += 4; in emitAlignedDPRCS2Restores()
1404 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1391 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1394 NextReg += 4; in emitAlignedDPRCS2Spills()
1410 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1413 NextReg += 4; in emitAlignedDPRCS2Spills()
1427 NextReg += 2; in emitAlignedDPRCS2Spills()
1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1436 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1525 NextReg += 4; in emitAlignedDPRCS2Restores()
1542 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1236 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1247 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1250 NextReg += 4; in emitAlignedDPRCS2Spills()
1266 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1269 NextReg += 4; in emitAlignedDPRCS2Spills()
1283 NextReg += 2; in emitAlignedDPRCS2Spills()
1289 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1292 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1381 NextReg += 4; in emitAlignedDPRCS2Restores()
1398 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1391 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1394 NextReg += 4; in emitAlignedDPRCS2Spills()
1410 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1413 NextReg += 4; in emitAlignedDPRCS2Spills()
1427 NextReg += 2; in emitAlignedDPRCS2Spills()
1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1436 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1525 NextReg += 4; in emitAlignedDPRCS2Restores()
1542 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1391 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1394 NextReg += 4; in emitAlignedDPRCS2Spills()
1410 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1413 NextReg += 4; in emitAlignedDPRCS2Spills()
1427 NextReg += 2; in emitAlignedDPRCS2Spills()
1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1436 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1525 NextReg += 4; in emitAlignedDPRCS2Restores()
1542 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1243 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1254 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1257 NextReg += 4; in emitAlignedDPRCS2Spills()
1273 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1276 NextReg += 4; in emitAlignedDPRCS2Spills()
1290 NextReg += 2; in emitAlignedDPRCS2Spills()
1296 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1299 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1388 NextReg += 4; in emitAlignedDPRCS2Restores()
1405 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8;
1391 .addReg(NextReg)
1394 NextReg += 4;
1410 .addReg(NextReg)
1413 NextReg += 4;
1427 NextReg += 2;
1433 MBB.addLiveIn(NextReg);
1436 .addReg(NextReg)
1525 NextReg += 4;
1542 NextReg += 4;
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1236 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1247 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1250 NextReg += 4; in emitAlignedDPRCS2Spills()
1266 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1269 NextReg += 4; in emitAlignedDPRCS2Spills()
1283 NextReg += 2; in emitAlignedDPRCS2Spills()
1289 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1292 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1381 NextReg += 4; in emitAlignedDPRCS2Restores()
1398 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1228 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1239 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1242 NextReg += 4; in emitAlignedDPRCS2Spills()
1258 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1261 NextReg += 4; in emitAlignedDPRCS2Spills()
1275 NextReg += 2; in emitAlignedDPRCS2Spills()
1281 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1284 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1373 NextReg += 4; in emitAlignedDPRCS2Restores()
1390 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1227 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1238 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1241 NextReg += 4; in emitAlignedDPRCS2Spills()
1257 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1260 NextReg += 4; in emitAlignedDPRCS2Spills()
1274 NextReg += 2; in emitAlignedDPRCS2Spills()
1280 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1283 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1372 NextReg += 4; in emitAlignedDPRCS2Restores()
1389 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1654 unsigned NextReg = CSI[i + 1].getReg(); in computeCalleeSaveRegisterPairs() local
1657 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
1658 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI)) in computeCalleeSaveRegisterPairs()
1659 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
1662 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
1663 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI)) in computeCalleeSaveRegisterPairs()
1664 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
1667 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs()
1668 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 869 unsigned NextReg = SrcReg; in getSrcVReg() local
872 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
877 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
878 if (NextReg == SrcReg || !TargetRegisterInfo::isVirtualRegister(NextReg)) in getSrcVReg()
880 SrcReg = NextReg; in getSrcVReg()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 869 unsigned NextReg = SrcReg; in getSrcVReg() local
872 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
877 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
878 if (NextReg == SrcReg || !TargetRegisterInfo::isVirtualRegister(NextReg)) in getSrcVReg()
880 SrcReg = NextReg; in getSrcVReg()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1742 unsigned NextReg = CSI[i + 1].getReg(); in computeCalleeSaveRegisterPairs() local
1745 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
1746 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI)) in computeCalleeSaveRegisterPairs()
1747 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
1750 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
1751 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI)) in computeCalleeSaveRegisterPairs()
1752 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
1755 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs()
1756 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 968 unsigned NextReg = SrcReg; in getSrcVReg() local
971 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
976 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
977 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg()
979 SrcReg = NextReg; in getSrcVReg()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 921 unsigned NextReg = SrcReg; in getSrcVReg() local
924 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
929 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
930 if (NextReg == SrcReg || !TargetRegisterInfo::isVirtualRegister(NextReg)) in getSrcVReg()
932 SrcReg = NextReg; in getSrcVReg()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1101 unsigned NextReg = SrcReg; in getSrcVReg() local
1104 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
1109 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
1110 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg()
1112 SrcReg = NextReg; in getSrcVReg()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1082 unsigned NextReg = SrcReg; in getSrcVReg() local
1085 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
1090 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
1091 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg()
1093 SrcReg = NextReg; in getSrcVReg()
|