/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 516 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 921 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 925 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 934 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 937 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1002 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1005 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1011 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E001, 1); in fd5_emit_restore() 1014 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1020 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E29A, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 267 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 272 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 314 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 332 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 377 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 391 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 515 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 535 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 571 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 717 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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H A D | fd5_draw.c | 54 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 179 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_clear_lrz() 185 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1); in fd5_clear_lrz() 191 OUT_PKT4(ring, REG_A5XX_GRAS_CNTL, 1); in fd5_clear_lrz() 194 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_clear_lrz() 197 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_clear_lrz() 214 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in fd5_clear_lrz() 217 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); in fd5_clear_lrz() 228 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_clear_lrz() [all …]
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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H A D | fd5_draw.c | 54 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 179 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_clear_lrz() 185 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1); in fd5_clear_lrz() 191 OUT_PKT4(ring, REG_A5XX_GRAS_CNTL, 1); in fd5_clear_lrz() 194 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_clear_lrz() 197 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_clear_lrz() 214 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in fd5_clear_lrz() 217 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); in fd5_clear_lrz() 228 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_clear_lrz() [all …]
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/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 527 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 978 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 982 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 991 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 994 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1059 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1062 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1068 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1083 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1086 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 272 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 277 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 320 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 336 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); in emit_binning_pass() 375 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 389 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 525 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 545 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 580 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 728 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/freedreno/a5xx/ |
H A D | fd5_emit.c | 519 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 970 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); in fd5_emit_restore() 974 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in fd5_emit_restore() 983 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); in fd5_emit_restore() 986 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in fd5_emit_restore() 1051 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); in fd5_emit_restore() 1054 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); in fd5_emit_restore() 1060 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); in fd5_emit_restore() 1075 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); in fd5_emit_restore() 1078 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); in fd5_emit_restore() [all …]
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H A D | fd5_gmem.c | 296 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3); in update_vsc_pipe() 301 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2); in update_vsc_pipe() 344 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_binning_pass() 399 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_emit_tile_init() 413 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_tile_init() 550 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_mem2gmem_surf() 570 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_mem2gmem() 605 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in fd5_emit_tile_renderprep() 654 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in emit_gmem2mem_surf() 732 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_emit_sysmem_prep() [all …]
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/freedreno/a6xx/ |
H A D | fd6_program.c | 89 OUT_PKT4(ring, instrlen, 1); in fd6_emit_shader() 92 OUT_PKT4(ring, obj_start, 2); in fd6_emit_shader() 242 OUT_PKT4(ring, REG_A6XX_HLSQ_VS_CNTL, 4); in setup_config_stateobj() 254 OUT_PKT4(ring, REG_A6XX_HLSQ_FS_CNTL, 1); in setup_config_stateobj() 258 OUT_PKT4(ring, REG_A6XX_SP_VS_CONFIG, 1); in setup_config_stateobj() 264 OUT_PKT4(ring, REG_A6XX_SP_HS_CONFIG, 1); in setup_config_stateobj() 271 OUT_PKT4(ring, REG_A6XX_SP_DS_CONFIG, 1); in setup_config_stateobj() 278 OUT_PKT4(ring, REG_A6XX_SP_GS_CONFIG, 1); in setup_config_stateobj() 285 OUT_PKT4(ring, REG_A6XX_SP_FS_CONFIG, 1); in setup_config_stateobj() 628 OUT_PKT4(ring, REG_A6XX_VPC_CNTL_0, 1); in setup_stateobj() [all …]
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