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Searched refs:PAD_CTL_FSEL1 (Results 1 – 25 of 858) sorted by relevance

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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-sopine/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-chip/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/engicam/imx8mm/
H A Dspl.c57 #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)

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