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Searched refs:PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (Results 1 – 25 of 126) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c554 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
586 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
594 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c617 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
649 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
657 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c617 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
649 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
657 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c617 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
649 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
657 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c617 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
649 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
657 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c620 #define PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE (1 << 5) macro
652 value |= PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()
660 value &= ~PMC_SATA_PWRGT_PLLE_IDDQ_OVERRIDE; in tegra_plle_train()

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