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Searched refs:RECIP_V4SF_DIV (Results 1 – 25 of 27) sorted by relevance

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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/rs6000/
H A Drs6000.c216 RECIP_V4SF_DIV = 0x004, enumerator
226 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
245 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
247 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3266 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/rs6000/
H A Drs6000.c214 RECIP_V4SF_DIV = 0x004, enumerator
224 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
245 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3236 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/rs6000/
H A Drs6000.c212 RECIP_V4SF_DIV = 0x004, enumerator
222 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
241 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3261 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/rs6000/
H A Drs6000.c214 RECIP_V4SF_DIV = 0x004, enumerator
224 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
245 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3242 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc11/gcc-11.2.0/gcc/config/rs6000/
H A Drs6000.c212 RECIP_V4SF_DIV = 0x004, enumerator
222 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
241 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3261 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/rs6000/
H A Drs6000.c212 RECIP_V4SF_DIV = 0x004, enumerator
222 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
241 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3261 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc10/gcc-10.3.0/gcc/config/rs6000/
H A Drs6000.c214 RECIP_V4SF_DIV = 0x004, enumerator
224 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
243 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
245 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3242 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/rs6000/
H A Drs6000.c248 RECIP_V4SF_DIV = 0x004, enumerator
258 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
277 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
279 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
2247 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc48/gcc-4.8.5/gcc/config/rs6000/
H A Drs6000.c251 RECIP_V4SF_DIV = 0x004, enumerator
261 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
280 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
282 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
2903 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/rs6000/
H A Drs6000.c268 RECIP_V4SF_DIV = 0x004, enumerator
278 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
297 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
299 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
2933 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc9/gcc-9.4.0/gcc/config/rs6000/
H A Drs6000.c301 RECIP_V4SF_DIV = 0x004, enumerator
311 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
330 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
332 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3552 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/rs6000/
H A Drs6000.c259 RECIP_V4SF_DIV = 0x004, enumerator
269 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
288 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
290 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3630 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/rs6000/
H A Drs6000.c301 RECIP_V4SF_DIV = 0x004, enumerator
311 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
330 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
332 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3552 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/rs6000/
H A Drs6000.c301 RECIP_V4SF_DIV = 0x004, enumerator
311 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
330 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
332 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3552 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc8/gcc-8.5.0/gcc/config/rs6000/
H A Drs6000.c304 RECIP_V4SF_DIV = 0x004, enumerator
314 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
333 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
335 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3793 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/rs6000/
H A Drs6000.c259 RECIP_V4SF_DIV = 0x004, enumerator
269 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
288 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
290 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3630 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/
H A Dpowerpcspe.c283 RECIP_V4SF_DIV = 0x004, enumerator
293 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
312 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
314 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3845 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/powerpcspe/
H A Dpowerpcspe.c283 RECIP_V4SF_DIV = 0x004, enumerator
293 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
312 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
314 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3845 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/
H A Dpowerpcspe.c283 RECIP_V4SF_DIV = 0x004, enumerator
293 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
312 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
314 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3845 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/powerpcspe/
H A Dpowerpcspe.c283 RECIP_V4SF_DIV = 0x004, enumerator
293 RECIP_ALL = (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
312 { "div", (RECIP_SF_DIV | RECIP_DF_DIV | RECIP_V4SF_DIV
314 { "divf", (RECIP_SF_DIV | RECIP_V4SF_DIV) },
3845 && (rs6000_recip_control & RECIP_V4SF_DIV) != 0) in rs6000_init_hard_regno_mode_ok()

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