| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/lang/clover/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/mesa/drivers/dri/i915/ |
| H A D | intel_reg.h | 158 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/ |
| H A D | i915_reg.h | 415 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/ |
| H A D | i915_reg.h | 415 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/cairo/cairo-1.17.4/src/drm/ |
| H A D | cairo-drm-intel-command-private.h | 436 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/www/firefox-esr/firefox-91.8.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-command-private.h | 436 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/www/firefox/firefox-99.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-command-private.h | 436 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/mail/thunderbird/thunderbird-91.8.0/gfx/cairo/cairo/src/drm/ |
| H A D | cairo-drm-intel-command-private.h | 436 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) macro
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 390 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7 << 4) macro
|