| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 72 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 41 #define SCR_FIQ (1 << 2) macro
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| H A D | ARM1176JZ-S.h | 122 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/sysutils/edk2/edk2-edk2-stable202102/ArmPkg/Include/Chipset/ |
| H A D | ArmV7.h | 65 #define SCR_FIQ (1 << 2) macro
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| H A D | AArch64.h | 34 #define SCR_FIQ (1 << 2) macro
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| /dports/emulators/qemu42/qemu-4.2.1/hw/intc/ |
| H A D | arm_gicv3_cpuif.c | 835 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_read()
866 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_write()
1551 route_fiq_to_el3 = env->cp15.scr_el3 & SCR_FIQ; in icc_dir_write()
1611 !arm_is_secure(env) && (env->cp15.scr_el3 & SCR_FIQ)) { in icc_rpr_read()
1897 if ((env->cp15.scr_el3 & (SCR_FIQ | SCR_IRQ)) == (SCR_FIQ | SCR_IRQ)) { in gicv3_irqfiq_access()
1963 if (env->cp15.scr_el3 & SCR_FIQ) { in gicv3_fiq_access()
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| /dports/emulators/qemu/qemu-6.2.0/hw/intc/ |
| H A D | arm_gicv3_cpuif.c | 842 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_read()
873 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_write()
1578 route_fiq_to_el3 = env->cp15.scr_el3 & SCR_FIQ; in icc_dir_write()
1638 !arm_is_secure(env) && (env->cp15.scr_el3 & SCR_FIQ)) { in icc_rpr_read()
1924 if ((env->cp15.scr_el3 & (SCR_FIQ | SCR_IRQ)) == (SCR_FIQ | SCR_IRQ)) { in gicv3_irqfiq_access()
1990 if (env->cp15.scr_el3 & SCR_FIQ) { in gicv3_fiq_access()
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| /dports/emulators/qemu60/qemu-6.0.0/hw/intc/ |
| H A D | arm_gicv3_cpuif.c | 839 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_read()
870 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_write()
1555 route_fiq_to_el3 = env->cp15.scr_el3 & SCR_FIQ; in icc_dir_write()
1615 !arm_is_secure(env) && (env->cp15.scr_el3 & SCR_FIQ)) { in icc_rpr_read()
1901 if ((env->cp15.scr_el3 & (SCR_FIQ | SCR_IRQ)) == (SCR_FIQ | SCR_IRQ)) { in gicv3_irqfiq_access()
1967 if (env->cp15.scr_el3 & SCR_FIQ) { in gicv3_fiq_access()
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/ |
| H A D | arm_gicv3_cpuif.c | 835 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_read()
866 (env->cp15.scr_el3 & SCR_FIQ)) { in icc_pmr_write()
1551 route_fiq_to_el3 = env->cp15.scr_el3 & SCR_FIQ; in icc_dir_write()
1611 !arm_is_secure(env) && (env->cp15.scr_el3 & SCR_FIQ)) { in icc_rpr_read()
1897 if ((env->cp15.scr_el3 & (SCR_FIQ | SCR_IRQ)) == (SCR_FIQ | SCR_IRQ)) { in gicv3_irqfiq_access()
1963 if (env->cp15.scr_el3 & SCR_FIQ) { in gicv3_fiq_access()
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