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Searched refs:SXTL (Results 1 – 25 of 52) sorted by relevance

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/dports/emulators/dolphin-emu/dolphin-3152428/Source/Core/Core/PowerPC/JitArm64/
H A DJitAsm.cpp236 float_emit.SXTL(8, D0, D0); in GenerateCommonAsm()
237 float_emit.SXTL(16, D0, D0); in GenerateCommonAsm()
265 float_emit.SXTL(16, D0, D0); in GenerateCommonAsm()
300 float_emit.SXTL(8, D0, D0); in GenerateCommonAsm()
301 float_emit.SXTL(16, D0, D0); in GenerateCommonAsm()
329 float_emit.SXTL(16, D0, D0); in GenerateCommonAsm()
/dports/emulators/dolphin-emu/dolphin-3152428/Source/Core/VideoCommon/
H A DVertexLoaderARM64.cpp149 m_float_emit.SXTL(8, EncodeRegToDouble(coords), EncodeRegToDouble(coords)); in ReadVertex()
150 m_float_emit.SXTL(16, EncodeRegToDouble(coords), EncodeRegToDouble(coords)); in ReadVertex()
158 m_float_emit.SXTL(16, EncodeRegToDouble(coords), EncodeRegToDouble(coords)); in ReadVertex()
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/GPU/Common/
H A DVertexDecoderArm64.cpp685 fp.SXTL(16, srcD[0], src[0]); in Jit_PosS16Through()
754 fp.SXTL(8, srcD[0], src[0]); in Jit_AnyS8ToFloat()
755 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS8ToFloat()
761 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS16ToFloat()
/dports/emulators/ppsspp/ppsspp-1.12.3/GPU/Common/
H A DVertexDecoderArm64.cpp685 fp.SXTL(16, srcD[0], src[0]); in Jit_PosS16Through()
754 fp.SXTL(8, srcD[0], src[0]); in Jit_AnyS8ToFloat()
755 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS8ToFloat()
761 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS16ToFloat()
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/GPU/Common/
H A DVertexDecoderArm64.cpp685 fp.SXTL(16, srcD[0], src[0]); in Jit_PosS16Through()
754 fp.SXTL(8, srcD[0], src[0]); in Jit_AnyS8ToFloat()
755 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS8ToFloat()
761 fp.SXTL(16, srcQ[0], srcD[0]); in Jit_AnyS16ToFloat()
/dports/emulators/simh/simh-3.9.0_5/VAX/
H A Dvax_defs.h577 #define SXTL(x) (((x) & LSIGN)? ((x) | ~LMASK): ((x) & LMASK)) macro
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Common/
H A DArm64Emitter.h927 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn); in CBZ()
981 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A DArm64Emitter.cpp3470 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn)
3472 SXTL(src_size, Rd, Rn, false);
3476 SXTL(src_size, Rd, Rn, true);
3535 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper)
/dports/emulators/ppsspp/ppsspp-1.12.3/Common/
H A DArm64Emitter.h927 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn);
981 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A DArm64Emitter.cpp3470 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn) in SXTL() function in Arm64Gen::ARM64FloatEmitter
3472 SXTL(src_size, Rd, Rn, false); in SXTL()
3476 SXTL(src_size, Rd, Rn, true); in SXTL2()
3535 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper) in SXTL() function in Arm64Gen::ARM64FloatEmitter
/dports/emulators/dolphin-emu/dolphin-3152428/Source/Core/Common/
H A DArm64Emitter.h1067 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn);
1129 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A DArm64Emitter.cpp3702 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn) in SXTL() function in Arm64Gen::ARM64FloatEmitter
3704 SXTL(src_size, Rd, Rn, false); in SXTL()
3708 SXTL(src_size, Rd, Rn, true); in SXTL2()
3788 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper) in SXTL() function in Arm64Gen::ARM64FloatEmitter
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Common/
H A DArm64Emitter.h927 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn);
981 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A DArm64Emitter.cpp3470 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn) in SXTL() function in Arm64Gen::ARM64FloatEmitter
3472 SXTL(src_size, Rd, Rn, false); in SXTL()
3476 SXTL(src_size, Rd, Rn, true); in SXTL2()
3535 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper) in SXTL() function in Arm64Gen::ARM64FloatEmitter
/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/
H A Da64_emitter.h1084 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn);
1153 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A Da64_emitter.cpp3325 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn) { in SXTL() function in Dynarmic::BackendA64::Arm64Gen::ARM64FloatEmitter
3326 SXTL(src_size, Rd, Rn, false); in SXTL()
3329 SXTL(src_size, Rd, Rn, true); in SXTL2()
3386 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper) { in SXTL() function in Dynarmic::BackendA64::Arm64Gen::ARM64FloatEmitter
/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/
H A Da64_emitter.h1084 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn);
1153 void SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper);
H A Da64_emitter.cpp3325 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn) { in SXTL() function in Dynarmic::BackendA64::Arm64Gen::ARM64FloatEmitter
3326 SXTL(src_size, Rd, Rn, false); in SXTL()
3329 SXTL(src_size, Rd, Rn, true); in SXTL2()
3386 void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper) { in SXTL() function in Dynarmic::BackendA64::Arm64Gen::ARM64FloatEmitter
/dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
H A Dtables.go389 SXTL const
858 SXTL: "SXTL",
2909 …{0xff87fc00, 0x0f00a400, SXTL, instArgs{arg_Vd_arrangement_immh___SEEAdvancedSIMDmodifiedimmediate…
/dports/lang/go-devel/go-dragonfly-amd64-bootstrap/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
H A Dtables.go389 SXTL const
858 SXTL: "SXTL",
2909 …{0xff87fc00, 0x0f00a400, SXTL, instArgs{arg_Vd_arrangement_immh___SEEAdvancedSIMDmodifiedimmediate…
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/AArch64/
H A DAArch64InstrInfo.td5297 // (sign extension with lengthen) SXTL FPR -> FPR is 2 cycles.
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/AArch64/
H A DAArch64InstrInfo.td5297 // (sign extension with lengthen) SXTL FPR -> FPR is 2 cycles.
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/AArch64/
H A DAArch64InstrInfo.td5297 // (sign extension with lengthen) SXTL FPR -> FPR is 2 cycles.
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/
H A DAArch64InstrInfo.td5692 // (sign extension with lengthen) SXTL FPR -> FPR is 2 cycles.
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/
H A DAArch64InstrInfo.td5563 // (sign extension with lengthen) SXTL FPR -> FPR is 2 cycles.

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