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Searched refs:TXCHARDISPVAL (Results 1 – 3 of 3) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/white_rabbit/wr_cores_v4_2/platform/xilinx/wr_gtp_phy/family7-gtx/
H A Dwhiterabbit_gtxe2_channel_wrapper_gt.vhd721 TXCHARDISPVAL => tied_to_ground_vec_i(7 downto 0),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/white_rabbit/wr_cores_v4_2/platform/xilinx/wr_gtp_phy/family7-gtp/
H A Dwhiterabbit_gtpe2_channel_wrapper_gt.vhd858 TXCHARDISPVAL => tied_to_ground_vec_i(3 downto 0),
/dports/cad/yosys/yosys-yosys-0.12/techlibs/xilinx/
H A Dcells_xtra.v10381 input [7:0] TXCHARDISPVAL; port
12571 input [3:0] TXCHARDISPVAL; port
13163 input [7:0] TXCHARDISPVAL; port
13709 input [3:0] TXCHARDISPVAL; port
14247 input [7:0] TXCHARDISPVAL; port