/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1330 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1331 EVT VT = V64Reg.getValueType(); in operator ()() 1335 SDLoc DL(V64Reg); in operator ()() 1339 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 5951 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 5952 EVT VT = V64Reg.getValueType(); in WidenVector() 5956 SDLoc DL(V64Reg); in WidenVector() 5959 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1299 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1300 EVT VT = V64Reg.getValueType(); in operator ()() 1304 SDLoc DL(V64Reg); in operator ()() 1308 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 5887 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 5888 EVT VT = V64Reg.getValueType(); in WidenVector() 5892 SDLoc DL(V64Reg); in WidenVector() 5895 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1301 SDValue operator()(SDValue V64Reg) { 1302 EVT VT = V64Reg.getValueType(); 1306 SDLoc DL(V64Reg); 1310 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg);
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H A D | AArch64ISelLowering.cpp | 5666 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 5667 EVT VT = V64Reg.getValueType(); in WidenVector() 5671 SDLoc DL(V64Reg); in WidenVector() 5674 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1387 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1388 EVT VT = V64Reg.getValueType(); in operator ()() 1392 SDLoc DL(V64Reg); in operator ()() 1396 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 6506 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6507 EVT VT = V64Reg.getValueType(); in WidenVector() 6511 SDLoc DL(V64Reg); in WidenVector() 6514 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1387 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1388 EVT VT = V64Reg.getValueType(); in operator ()() 1392 SDLoc DL(V64Reg); in operator ()() 1396 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 6506 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6507 EVT VT = V64Reg.getValueType(); in WidenVector() 6511 SDLoc DL(V64Reg); in WidenVector() 6514 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1387 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1388 EVT VT = V64Reg.getValueType(); in operator ()() 1392 SDLoc DL(V64Reg); in operator ()() 1396 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 6506 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6507 EVT VT = V64Reg.getValueType(); in WidenVector() 6511 SDLoc DL(V64Reg); in WidenVector() 6514 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1568 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1569 EVT VT = V64Reg.getValueType(); in operator ()() 1573 SDLoc DL(V64Reg); in operator ()() 1577 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1555 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1556 EVT VT = V64Reg.getValueType(); in operator ()() 1560 SDLoc DL(V64Reg); in operator ()() 1564 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 6920 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6921 EVT VT = V64Reg.getValueType(); in WidenVector() 6925 SDLoc DL(V64Reg); in WidenVector() 6928 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1614 EVT VT = V64Reg.getValueType(); in operator ()() 1618 SDLoc DL(V64Reg); in operator ()() 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1571 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1572 EVT VT = V64Reg.getValueType(); in operator ()() 1576 SDLoc DL(V64Reg); in operator ()() 1580 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1562 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1563 EVT VT = V64Reg.getValueType(); in operator ()() 1567 SDLoc DL(V64Reg); in operator ()() 1571 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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H A D | AArch64ISelLowering.cpp | 6941 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6942 EVT VT = V64Reg.getValueType(); in WidenVector() 6946 SDLoc DL(V64Reg); in WidenVector() 6949 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1614 EVT VT = V64Reg.getValueType(); in operator ()() 1618 SDLoc DL(V64Reg); in operator ()() 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1614 EVT VT = V64Reg.getValueType(); in operator ()() 1618 SDLoc DL(V64Reg); in operator ()() 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1614 EVT VT = V64Reg.getValueType(); in operator ()() 1618 SDLoc DL(V64Reg); in operator ()() 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1614 EVT VT = V64Reg.getValueType(); in operator ()() 1618 SDLoc DL(V64Reg); in operator ()() 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1571 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1572 EVT VT = V64Reg.getValueType(); in operator ()() 1576 SDLoc DL(V64Reg); in operator ()() 1580 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1613 SDValue operator()(SDValue V64Reg) { 1614 EVT VT = V64Reg.getValueType(); 1618 SDLoc DL(V64Reg); 1622 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg);
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