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Searched refs:VGETLANEu (Results 1 – 25 of 62) sorted by relevance

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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h165 VGETLANEu, // zero-extend vector extract element in decode_slice()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h174 VGETLANEu, // zero-extend vector extract element enumerator
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMISelLowering.h174 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h174 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h175 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h166 VGETLANEu, // zero-extend vector extract element enumerator
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.h177 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/
H A DARMISelLowering.h177 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h177 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h177 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h177 VGETLANEu, // zero-extend vector extract element enumerator
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3102 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3104 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
H A DARMISelLowering.cpp1708 MAKE_CASE(ARMISD::VGETLANEu) in getTargetNodeName()
8817 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
14446 return DAG.getNode(ARMISD::VGETLANEu, SDLoc(N), VT, N0->getOperand(0), in PerformVMOVrhCombine()
14837 if (Op.getOpcode() == ARMISD::VGETLANEu && in PerformSignExtendInregCombine()
15750 DAG.getNodeIfExists(ARMISD::VGETLANEu, DAG.getVTList(MVT::i32), in PerformExtractFpToIntStores()
16733 Opc = ARMISD::VGETLANEu; in PerformExtendCombine()
18864 case ARMISD::VGETLANEu: { in computeKnownBitsForTargetNode()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3102 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3104 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
H A DARMISelLowering.cpp1708 MAKE_CASE(ARMISD::VGETLANEu) in getTargetNodeName()
8817 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
14446 return DAG.getNode(ARMISD::VGETLANEu, SDLoc(N), VT, N0->getOperand(0), in PerformVMOVrhCombine()
14837 if (Op.getOpcode() == ARMISD::VGETLANEu && in PerformSignExtendInregCombine()
15750 DAG.getNodeIfExists(ARMISD::VGETLANEu, DAG.getVTList(MVT::i32), in PerformExtractFpToIntStores()
16733 Opc = ARMISD::VGETLANEu; in PerformExtendCombine()
18864 case ARMISD::VGETLANEu: { in computeKnownBitsForTargetNode()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3098 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3100 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3107 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3109 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3102 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3104 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h183 VGETLANEu, // zero-extend vector extract element enumerator
H A DARMISelDAGToDAG.cpp3102 Val1.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3104 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()

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