| /dports/science/nwchem/nwchem-7b21660b82ebd85ef659f6fba7e1e73433b0bd0a/src/rimp2/ |
| H A D | occ_ranges.F | 10 Subroutine Occ_Ranges( N, Occ, OLo, OHi, VLo, VHi) argument
12 Integer N, OLo, OHi, VLo, VHi local
48 VHi = 0
58 VHi = N
|
| /dports/science/nwchem-data/nwchem-7.0.2-release/src/rimp2/ |
| H A D | occ_ranges.F | 10 Subroutine Occ_Ranges( N, Occ, OLo, OHi, VLo, VHi) argument
12 Integer N, OLo, OHi, VLo, VHi local
48 VHi = 0
58 VHi = N
|
| /dports/graphics/wdune/wdune-1.926/vcglib/vcg/complex/ |
| H A D | append.h | 92 vl.VHi() = vr.VHi(); in ImportVertexAdj()
|
| /dports/devel/vcglib/vcglib-2020.09/vcg/complex/ |
| H A D | append.h | 97 vl.VHi() = vr.VHi(); in ImportVertexAdj()
|
| /dports/devel/vcglib/vcglib-2020.09/vcg/simplex/vertex/ |
| H A D | component.h | 140 int &VHi() { static int z=0; return z;} in VHi() function
581 int &VHi() {return _zp; } in VHi() function
|
| /dports/graphics/wdune/wdune-1.926/vcglib/vcg/simplex/vertex/ |
| H A D | component.h | 132 int &VHi() { static int z=0; return z;} in VHi() function
573 int &VHi() {return _zp; } in VHi() function
|
| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 605 SDValue VLo, VHi; in SplitVecRes_CONVERT_RNDSAT() local
614 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0), in SplitVecRes_CONVERT_RNDSAT()
619 GetSplitVector(N->getOperand(0), VLo, VHi); in SplitVecRes_CONVERT_RNDSAT()
630 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, in SplitVecRes_CONVERT_RNDSAT()
637 SDValue STyOpHi = DAG.getValueType(VHi.getValueType()); in SplitVecRes_CONVERT_RNDSAT()
641 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp, in SplitVecRes_CONVERT_RNDSAT()
|
| /dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/VectorCompiler/lib/GenXCodeGen/ |
| H A D | GenXUtil.cpp | 1149 Constant *VHi = ConstantInt::get(Ty32, static_cast<uint32_t>(Val64 >> 32)); in convertI64ToI32() local
1150 return std::make_pair(VLo, VHi); in convertI64ToI32()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11622 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
11626 std::swap (VLo, VHi); in createGPRPairNode()
11631 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11433 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
11437 std::swap (VLo, VHi); in createGPRPairNode()
11442 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11168 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
11172 std::swap (VLo, VHi); in createGPRPairNode()
11177 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12841 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
12845 std::swap (VLo, VHi); in createGPRPairNode()
12850 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12841 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
12845 std::swap (VLo, VHi); in createGPRPairNode()
12850 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12841 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
12845 std::swap (VLo, VHi); in createGPRPairNode()
12850 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14326 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
14330 std::swap (VLo, VHi); in createGPRPairNode()
14335 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14361 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
14365 std::swap (VLo, VHi); in createGPRPairNode()
14370 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7905 SDValue VHi = DAG.getAnyExtOrTrunc(
7910 std::swap (VLo, VHi);
7915 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 };
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7965 SDValue VHi = DAG.getAnyExtOrTrunc(
7970 std::swap (VLo, VHi);
7975 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 };
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15464 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
15468 std::swap (VLo, VHi); in createGPRPairNode()
15473 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8294 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
8299 std::swap (VLo, VHi); in createGPRPairNode()
8304 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9201 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
9206 std::swap (VLo, VHi); in createGPRPairNode()
9211 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16090 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
16094 std::swap (VLo, VHi); in createGPRPairNode()
16099 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9201 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
9206 std::swap (VLo, VHi); in createGPRPairNode()
9211 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9201 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
9206 std::swap (VLo, VHi); in createGPRPairNode()
9211 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16090 SDValue VHi = DAG.getAnyExtOrTrunc( in createGPRPairNode() local
16094 std::swap (VLo, VHi); in createGPRPairNode()
16099 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 }; in createGPRPairNode()
|