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Searched refs:VMLALVAs (Results 1 – 25 of 33) sorted by relevance

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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.h242 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1742 case ARMISD::VMLALVAs: return "ARMISD::VMLALVAs"; in getTargetNodeName()
12446 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
12450 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
H A DARMInstrMVE.td1156 def ARMVMLALVAs : SDNode<"ARMISD::VMLALVAs", SDTVecReduce2LA>;
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/
H A DARMISelLowering.h234 VMLALVAs, enumerator
H A DARMISelLowering.cpp1733 case ARMISD::VMLALVAs: return "ARMISD::VMLALVAs"; in getTargetNodeName()
12251 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
12255 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
H A DARMInstrMVE.td1016 def ARMVMLALVAs : SDNode<"ARMISD::VMLALVAs", SDTVecReduce2LA>;
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h242 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1749 case ARMISD::VMLALVAs: return "ARMISD::VMLALVAs"; in getTargetNodeName()
12451 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
12455 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h234 VMLALVAs, enumerator
H A DARMISelLowering.cpp1733 case ARMISD::VMLALVAs: return "ARMISD::VMLALVAs"; in getTargetNodeName()
12254 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
12258 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
H A DARMInstrMVE.td1016 def ARMVMLALVAs : SDNode<"ARMISD::VMLALVAs", SDTVecReduce2LA>;
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h242 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1749 case ARMISD::VMLALVAs: return "ARMISD::VMLALVAs"; in getTargetNodeName()
12451 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
12455 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1753 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13131 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13135 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1753 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13131 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13135 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1753 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13131 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13135 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1766 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13367 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13371 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16406 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1753 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13131 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13135 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.h253 VMLALVAs, // Same as VMLALV but also add an input accumulator enumerator
H A DARMISelLowering.cpp1753 MAKE_CASE(ARMISD::VMLALVAs) in getTargetNodeName()
13131 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13135 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()

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