/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 143 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1618 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6106 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6126 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 143 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1618 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6106 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6126 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 143 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1618 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6106 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6126 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 144 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1512 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 5737 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 5757 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1680 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6295 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6315 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1678 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6299 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6319 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1687 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6281 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6301 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1678 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6299 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6319 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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H A D | ARMISelLowering.cpp | 1687 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName() 6281 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift() 6301 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 152 VSHLu, // ...left/right by unsigned enumerator
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
H A D | ARMGenFastISel.inc | 3305 // FastEmit functions for ARMISD::VSHLu. 5485 case ARMISD::VSHLu: return fastEmit_ARMISD_VSHLu_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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