/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 147 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1620 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13820 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 147 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1620 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13820 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 147 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1620 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13820 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 148 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1514 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 5746 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 12687 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 12884 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 150 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1682 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6304 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15236 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 15499 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 150 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1680 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6308 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 14893 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 15156 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 150 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1689 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6290 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15290 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 15553 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 150 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1680 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6308 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 14896 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 15159 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 150 VSHRsIMM, // ...right (signed) enumerator
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H A D | ARMISelLowering.cpp | 1689 case ARMISD::VSHRsIMM: return "ARMISD::VSHRsIMM"; in getTargetNodeName() 6290 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15290 VShiftOpc = (IntNo == Intrinsic::arm_neon_vshifts ? ARMISD::VSHRsIMM in PerformIntrinsicCombine() 15553 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 156 VSHRsIMM, // ...right (signed) enumerator
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
H A D | ARMGenFastISel.inc | 6237 // FastEmit functions for ARMISD::VSHRsIMM. 6515 case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri(VT, RetVT, Op0, Op0IsKill, imm1); 6738 // FastEmit functions for ARMISD::VSHRsIMM. 6798 …case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_7(VT, RetVT, Op0, Op0IsKi… 7148 // FastEmit functions for ARMISD::VSHRsIMM. 7207 …case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_31(VT, RetVT, Op0, Op0IsK… 7702 // FastEmit functions for ARMISD::VSHRsIMM. 7743 …case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_15(VT, RetVT, Op0, Op0IsK…
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