/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 148 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1621 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5530 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13821 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 148 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1621 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5530 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13821 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 148 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1621 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5530 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6115 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 13821 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 14017 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 149 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1515 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5160 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 5746 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 12688 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 12884 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 151 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1683 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5773 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6304 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15237 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 15499 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 151 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1681 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5777 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6308 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 14894 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 15156 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 151 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1690 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5759 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6290 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15291 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 15553 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 151 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1681 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5777 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6308 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 14897 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 15159 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 151 VSHRuIMM, // ...right (unsigned) enumerator
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H A D | ARMISelLowering.cpp | 1690 case ARMISD::VSHRuIMM: return "ARMISD::VSHRuIMM"; in getTargetNodeName() 5759 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN() 6290 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in LowerShift() 15291 : ARMISD::VSHRuIMM); in PerformIntrinsicCombine() 15553 (N->getOpcode() == ISD::SRA ? ARMISD::VSHRsIMM : ARMISD::VSHRuIMM); in PerformShiftCombine()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 157 VSHRuIMM, // ...right (unsigned) enumerator
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
H A D | ARMGenFastISel.inc | 6325 // FastEmit functions for ARMISD::VSHRuIMM. 6516 case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri(VT, RetVT, Op0, Op0IsKill, imm1); 6756 // FastEmit functions for ARMISD::VSHRuIMM. 6799 …case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_7(VT, RetVT, Op0, Op0IsKi… 7166 // FastEmit functions for ARMISD::VSHRuIMM. 7208 …case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_31(VT, RetVT, Op0, Op0IsK… 7720 // FastEmit functions for ARMISD::VSHRuIMM. 7744 …case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_15(VT, RetVT, Op0, Op0IsK…
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