| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 3046 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3048 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3064 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 3403 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3405 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3421 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 3403 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3405 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3421 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 3403 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3405 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3421 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4033 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4035 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4051 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3878 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3880 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3896 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3879 MachineInstr *WidenedOp2 = in emitVectorConcat() local
3881 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
3897 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4481 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4483 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4499 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4481 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4483 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4499 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4295 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4297 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4313 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4481 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4483 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4499 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4481 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4483 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4499 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4295 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4297 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4313 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4481 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4483 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4499 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4556 MachineInstr *WidenedOp2 = in emitVectorConcat() local
4558 if (!WidenedOp1 || !WidenedOp2) { in emitVectorConcat()
4574 .addUse(WidenedOp2->getOperand(0).getReg()) in emitVectorConcat()
|