| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/regulator/ |
| H A D | cpcap-regulator.c | 101 const u16 assign_reg; member
127 .assign_reg = (assignment_reg), \
179 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_enable()
199 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
207 regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/regulator/ |
| H A D | cpcap-regulator.c | 101 const u16 assign_reg; member
127 .assign_reg = (assignment_reg), \
179 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_enable()
199 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
207 regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/regulator/ |
| H A D | cpcap-regulator.c | 101 const u16 assign_reg; member
127 .assign_reg = (assignment_reg), \
179 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_enable()
199 error = regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
207 regmap_update_bits(rdev->regmap, regulator->assign_reg, in cpcap_regulator_disable()
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/lang/clover/mesa-21.3.6/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1199 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1237 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1308 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1334 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1344 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1550 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1720 assign_reg(phi, phi->dsts[0], num); in assign_phi()
1725 assign_reg(phi, phi->srcs[i], num); in assign_phi()
1726 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
1781 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/lang/mono/mono-5.10.1.57/mono/mini/ |
| H A D | mini-codegen.c | 1441 assign_reg (cfg, rs, sreg, dest_sreg, 0); in mono_local_regalloc()
1494 assign_reg (cfg, rs, ins->dreg, new_dest, 0); in mono_local_regalloc()
1622 assign_reg (cfg, rs, ins->dreg, val, bank); in mono_local_regalloc()
1670 assign_reg (cfg, rs, reg2, val, bank); in mono_local_regalloc()
1826 assign_reg (cfg, rs, reg, hreg, 0); in mono_local_regalloc()
1846 assign_reg (cfg, rs, reg, hreg, 1); in mono_local_regalloc()
1875 assign_reg (cfg, rs, sreg1, val, bank); in mono_local_regalloc()
1887 assign_reg (cfg, rs, sreg1 + 1, val, bank); in mono_local_regalloc()
1951 assign_reg (cfg, rs, sregs [0], val, bank); in mono_local_regalloc()
2021 assign_reg (cfg, rs, reg2, val, bank); in mono_local_regalloc()
[all …]
|
| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 36 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
60 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
62 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1226 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1228 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 1453 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, in assign_reg() function
1491 assign_reg(dst->instr, dst, ra_interval_get_num(interval)); in insert_dst()
1578 assign_reg(instr, src, ra_physreg_to_num(physreg, src->flags)); in assign_src()
1605 assign_reg(pcopy, reg, ra_interval_get_num(entry->interval)); in insert_parallel_copy_instr()
1616 assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags)); in insert_parallel_copy_instr()
1827 assign_reg(instr, instr->dsts[0], ra_interval_get_num(interval)); in assign_input()
1997 assign_reg(phi, phi->dsts[0], num); in assign_phi()
2002 assign_reg(phi, phi->srcs[i], num); in assign_phi()
2003 assign_reg(phi, phi->srcs[i]->def, num); in assign_phi()
2059 assign_reg(pcopy, dst_reg, ra_physreg_to_num(dst, reg->flags)); in insert_liveout_copy()
[all …]
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() function
61 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs_trivial()
63 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs_trivial()
1240 assign_reg(hw_reg_mapping, &inst->dst); in assign_regs()
1242 assign_reg(hw_reg_mapping, &inst->src[i]); in assign_regs()
|