Searched refs:au_user_clk (Results 1 – 4 of 4) sorted by relevance
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/sim/aurora_loopback/ |
| H A D | aurora_loopback_tb.sv | 110 .user_clk(au_user_clk),
139 .user_clk(au_user_clk),
272 repeat (3) @(posedge au_user_clk);
277 @(posedge au_user_clk);
279 repeat (512) @(posedge au_user_clk);
282 @(posedge au_user_clk);
284 repeat (256) @(posedge au_user_clk);
364 @(posedge au_user_clk);
368 @(posedge au_user_clk);
370 repeat (512) @(posedge au_user_clk);
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
| H A D | x300_sfpp_io_core.v | 294 wire au_user_clk, au_user_rst, phy_areset; net
308 .user_clk(au_user_clk),
361 .phy_clk(au_user_clk), .phy_rst(au_user_rst),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/mg/ |
| H A D | n3xx.v | 1024 wire au_user_clk; net
1053 .user_clk(au_user_clk),
1058 assign au_user_clk = 1'b0;
1371 .user_clk (au_user_clk),
1428 .user_clk (au_user_clk),
1688 .user_clk(au_user_clk),
1860 .user_clk(au_user_clk),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/rh/ |
| H A D | n3xx.v | 1013 wire au_user_clk; net
1042 .user_clk(au_user_clk),
1047 assign au_user_clk = 1'b0;
1361 .user_clk (au_user_clk),
1418 .user_clk (au_user_clk),
1679 .user_clk(au_user_clk),
1851 .user_clk(au_user_clk),
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