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Searched refs:ccp1con (Results 1 – 25 of 26) sorted by relevance

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/dports/misc/gpsim/gpsim-0.31.0/src/
H A Dp16f88x.cc208 remove_sfr_register(&ccp1con); in ~P16F88x()
406 tmr2.add_ccp(&ccp1con); in create_sfr_map()
410 ccp1con.setBitMask(0xff); in create_sfr_map()
411 ccp1con.pstrcon = &pstrcon; in create_sfr_map()
412 ccp1con.pwm1con = &pwm1con; in create_sfr_map()
1721 tmr2.add_ccp(&ccp1con); in create_sfr_map()
1726 ccp1con.setBitMask(0xff); in create_sfr_map()
1727 ccp1con.pstrcon = &pstrcon; in create_sfr_map()
1728 ccp1con.pwm1con = &pwm1con; in create_sfr_map()
2063 tmr2.add_ccp(&ccp1con); in create_sfr_map()
[all …]
H A Dp16x7x.cc175 ccp1con(this, "ccp1con", "Capture Compare Control"), in P16x71x()
221 remove_sfr_register(&ccp1con); in ~P16x71x()
293 tmr2.add_ccp(&ccp1con); in create_sfr_map()
335 add_sfr_register(&ccp1con, 0x17, RegisterValue(0, 0)); in create_sfr_map()
336 ccp1con.setIOpin(&(*m_portb)[3], 0, 0, 0); in create_sfr_map()
337 ccp1con.setBitMask(0x3f); in create_sfr_map()
390 ccp1con.setIOpin(&(*m_portb)[3], 0, 0, 0); in create_sfr_map()
391 ccp1con.setBitMask(0x3f); in create_sfr_map()
505 eccpas.link_registers(&pwm1con, &ccp1con); in create_sfr_map()
508 ccp1con.setBitMask(0xff); in create_sfr_map()
[all …]
H A Dp1xf1xxx.cc337 remove_sfr_register(&ccp1con); in ~P12F1822()
373 remove_sfr_register(&ccp1con); in ~P12F1822()
542 tmr2.add_ccp(&ccp1con); in create_sfr_map()
548 ccp1con.pstrcon = &pstr1con; in create_sfr_map()
549 ccp1con.pwm1con = &pwm1con; in create_sfr_map()
1860 remove_sfr_register(&ccp1con); in ~P16F170x()
2426 ccp1con.set_cog(&cog); in create_sfr_map()
3220 tmr2.add_ccp(&ccp1con); in create_sfr_map()
3226 ccp1con.pstrcon = &pstr1con; in create_sfr_map()
3227 ccp1con.pwm1con = &pwm1con; in create_sfr_map()
[all …]
H A Dp18fk.cc215 eccp1as.link_registers(&pwm1con, &ccp1con); in create()
217 ccp1con.setBitMask(0xff); in create()
218 ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccp1as); in create()
219 ccp1con.pwm1con = &pwm1con; in create()
220 ccp1con.pstrcon = &pstrcon; in create()
640 ccptmrs.set_ccp(&ccp1con, &ccp2con, &ccp3con, &ccp4con, &ccp5con); in P18F26K22()
1275 eccp1as.link_registers(&pwm1con, &ccp1con); in create_sfr_map()
1279 ccp1con.setBitMask(0xff); in create_sfr_map()
1284 ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccp1as); in create_sfr_map()
1287 ccp1con.pwm1con = &pwm1con; in create_sfr_map()
[all …]
H A Dp16x6x.cc253 add_sfr_register(&ccp1con, 0x17, RegisterValue(0, 0)); in create_sfr_map()
271 tmr2.add_ccp(&ccp1con); in create_sfr_map()
274 ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1::CCP1IF, &tmr2); in create_sfr_map()
275 ccp1con.setIOpin(&((*m_portc)[2])); in create_sfr_map()
282 ccp1con.new_name("ccp1con"); in create_sfr_map()
315 ccp1con(this, "ccp1con", "Capture Compare Control"), in P16X6X_processor()
356 remove_sfr_register(&ccp1con); in ~P16X6X_processor()
H A D16bit-processors.cc243 ccp1con(this, "ccp1con", "Capture Compare Control"), in _16bit_processor()
369 remove_sfr_register(&ccp1con); in delete_sfr_map()
531 add_sfr_register(&ccp1con, 0xfbd, porv, "ccp1con"); in create_sfr_map()
640 tmr2.add_ccp(&ccp1con); in create_sfr_map()
657 ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2); in create_sfr_map()
659 ccp1con.setIOpin(&((*m_portc)[2])); in create_sfr_map()
H A Dp18x.cc1615 ccp1con.setBitMask(0xff); in create()
1618 eccpas.link_registers(&pwm1con, &ccp1con); in create()
1619 ccp1con.pwm1con = &pwm1con; in create()
1842 eccpas.link_registers(&pwm1con, &ccp1con); in create()
1844 ccp1con.setBitMask(0x3f); in create()
1846 ccp1con.pwm1con = &pwm1con; in create()
1847 ccp1con.setIOpin(&((*m_portc)[2]), 0, 0, 0); in create()
2335 eccpas.link_registers(&pwm1con, &ccp1con); in create()
2337 ccp1con.setBitMask(0xff); in create()
2339 ccp1con.pwm1con = &pwm1con; in create()
[all …]
H A Dp12f6xx.cc533 ccp1con(this, "ccp1con", "Capture Compare Control"), in P12F683()
556 remove_sfr_register(&ccp1con); in ~P12F683()
583 add_sfr_register(&ccp1con, 0x15, RegisterValue(0, 0)); in create_sfr_map()
594 tmr2.add_ccp(&ccp1con); in create_sfr_map()
596 ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1::CCP1IF, &tmr2); in create_sfr_map()
597 ccp1con.setIOpin(&((*m_gpio)[2])); in create_sfr_map()
H A Dp16f91x.cc49 ccp1con(this, "ccp1con", "Capture Compare Control"), in P16F91X()
146 remove_sfr_register(&ccp1con); in ~P16F91X()
361 tmr2.add_ccp(&ccp1con); in create_sfr_map()
364 ccp1con.setIOpin(&(*m_portc)[5]); in create_sfr_map()
365 ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v4::CCP1IF, &tmr2); in create_sfr_map()
430 add_sfr_register(&ccp1con, 0x17, RegisterValue(0, 0)); in create_sfr_map()
H A Dp16f88x.h82 CCPCON ccp1con; variable
532 CCPCON ccp1con; variable
590 CCPCON ccp1con; variable
H A Dp16f8x.cc332 ccp1con.setIOpin(&((*m_portb)[0])); in set_config_word()
335 ccp1con.setIOpin(&((*m_portb)[3])); in set_config_word()
656 ccp1con.setIOpin(&((*m_portb)[2])); in set_config_word()
659 ccp1con.setIOpin(&((*m_portb)[3])); in set_config_word()
H A Dp16f91x.h81 CCPCON ccp1con; variable
H A Dp1xf1xxx.h42 CCPCON ccp1con; variable
331 CCPCON ccp1con; variable
522 CCPCON ccp1con; variable
H A Dp16x6x.h83 CCPCON ccp1con; variable
H A Dp16x7x.h92 CCPCON ccp1con; variable
H A Dp12f6xx.h139 CCPCON ccp1con; variable
H A D16bit-processors.h119 CCPCON ccp1con; variable
H A Dp16f62x.cc149 ccp1con.setIOpin(&((*m_portb)[3])); in create_sfr_map()
H A D14bit-tmrs.h135 CCPCON *ccp1con = nullptr; variable
/dports/misc/gpsim/gpsim-0.31.0/examples/14bit/
H A Dp16c64_test.asm129 movwf ccp1con
149 movwf ccp1con
163 ;; incf ccp1con,f
H A Dp16f877_test.asm284 btfsc ccp1con,2
313 movwf ccp1con
H A Dp16c64_ccp.asm230 ;; If bit 2 of ccp1con is set then we're through with capture modes
/dports/misc/gpsim/gpsim-0.31.0/regression/ccp/
H A Dccp_877a.asm414 ;; If bit 2 of ccp1con is set then we're through with capture modes
425 .assert "(tmr1h==0) && (tmr1l<0x40), '*** FAILED CCP 16f877a ccp1con=b no tmr1 reset'"
H A Dccp_819.asm396 ;; If bit 2 of ccp1con is set then we're through with capture modes
/dports/misc/gpsim/gpsim-0.31.0/regression/p16f91x/
H A Dccp_917.asm418 ;; If bit 2 of ccp1con is set then we're through with capture modes
429 .assert "(tmr1h==0) && (tmr1l<0x40), '*** FAILED CCP 16f917 ccp1con=b no tmr1 reset'"

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