1 /* 2 Copyright (C) 2009 Roy R. Rankin 3 4 This file is part of the libgpsim library of gpsim 5 6 This library is free software; you can redistribute it and/or 7 modify it under the terms of the GNU Lesser General Public 8 License as published by the Free Software Foundation; either 9 version 2.1 of the License, or (at your option) any later version. 10 11 This library is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 Lesser General Public License for more details. 15 16 You should have received a copy of the GNU Lesser General Public 17 License along with this library; if not, see 18 <http://www.gnu.org/licenses/lgpl-2.1.html>. 19 */ 20 21 #ifndef SRC_P12F629_H_ 22 #define SRC_P12F629_H_ 23 24 #include "14bit-processors.h" 25 #include "14bit-tmrs.h" 26 #include "intcon.h" 27 #include "pir.h" 28 #include "pie.h" 29 #include "eeprom.h" 30 #include "comparator.h" 31 #include "a2dconverter.h" 32 #include "pm_rd.h" 33 #include "cwg.h" 34 #include "nco.h" 35 #include "clc.h" 36 37 class WPU; 38 class IOC; 39 class PicPortGRegister; 40 41 class P12F629 : public _14bit_processor 42 { 43 public: 44 INTCON_14_PIR intcon_reg; 45 ComparatorModule comparator; 46 PIR_SET_1 pir_set_def; 47 PIE pie1; 48 PIR *pir1; 49 T1CON t1con; 50 TMRL tmr1l; 51 TMRH tmr1h; 52 PCON pcon; 53 OSCCAL osccal; 54 EEPROM_PIR *e; 55 INT_pin int_pin; 56 57 PicPortGRegister *m_gpio; 58 PicTrisRegister *m_trisio; 59 WPU *m_wpu; 60 IOC *m_ioc; 61 get_pir2()62 virtual PIR *get_pir2() 63 { 64 return nullptr; 65 } get_pir1()66 virtual PIR *get_pir1() 67 { 68 return pir1; 69 } get_pir_set()70 virtual PIR_SET *get_pir_set() 71 { 72 return &pir_set_def; 73 } 74 75 isa()76 virtual PROCESSOR_TYPE isa() 77 { 78 return _P12F629_; 79 } 80 P12F629(const char *_name = nullptr, const char *desc = nullptr); 81 ~P12F629(); 82 static Processor *construct(const char *name); 83 virtual void create_sfr_map(); 84 virtual void create_symbols(); 85 virtual void set_out_of_range_pm(unsigned int address, unsigned int value); 86 virtual void create_iopin_map(); 87 virtual void create(int ram_top, int eeprom_size); register_memory_size()88 virtual unsigned int register_memory_size() const 89 { 90 return 0x100; 91 } 92 virtual void option_new_bits_6_7(unsigned int bits); program_memory_size()93 virtual unsigned int program_memory_size() const 94 { 95 return 0x400; 96 } 97 virtual void create_config_memory(); 98 virtual bool set_config_word(unsigned int address, unsigned int cfg_word); 99 virtual void enter_sleep(); 100 virtual void exit_sleep(); 101 }; 102 103 104 class P12F675 : public P12F629 105 { 106 public: 107 108 ANSEL_12F ansel; 109 ADCON0_12F adcon0; 110 ADCON1 adcon1; 111 sfr_register adresh; 112 sfr_register adresl; 113 114 isa()115 virtual PROCESSOR_TYPE isa() 116 { 117 return _P12F675_; 118 } 119 120 virtual void create(int ram_top, int eeprom_size); program_memory_size()121 virtual unsigned int program_memory_size() const 122 { 123 return 0x400; 124 } 125 126 P12F675(const char *_name = nullptr, const char *desc = nullptr); 127 ~P12F675(); 128 static Processor *construct(const char *name); 129 virtual void create_sfr_map(); 130 }; 131 132 133 class P12F683 : public P12F675 134 { 135 public: 136 T2CON t2con; 137 PR2 pr2; 138 TMR2 tmr2; 139 CCPCON ccp1con; 140 CCPRL ccpr1l; 141 CCPRH ccpr1h; 142 WDTCON wdtcon; 143 OSCCON *osccon; 144 OSCTUNE osctune; 145 146 isa()147 virtual PROCESSOR_TYPE isa() 148 { 149 return _P12F683_; 150 }; 151 152 virtual void create(int ram_top, int eeprom_size); program_memory_size()153 virtual unsigned int program_memory_size() const 154 { 155 return 0x800; 156 } 157 158 P12F683(const char *_name = nullptr, const char *desc = nullptr); 159 ~P12F683(); 160 static Processor *construct(const char *name); 161 virtual void create_sfr_map(); 162 }; 163 164 165 class P10F32X : public _14bit_processor 166 { 167 public: 168 INTCON_14_PIR intcon_reg; 169 PIR_SET_1 pir_set_def; 170 PIE pie1; 171 PIR *pir1; 172 T2CON t2con; 173 TMR2 tmr2; 174 PR2 pr2; 175 PCON pcon; 176 ANSEL_P ansela; 177 FVRCON fvrcon; 178 BORCON borcon; 179 WDTCON wdtcon; 180 OSCCON *osccon; 181 ADCON0_32X adcon0; 182 ADCON1 adcon1; 183 sfr_register adres; 184 PWMxCON pwm1con; 185 sfr_register pwm1dcl; 186 sfr_register pwm1dch; 187 PWMxCON pwm2con; 188 sfr_register pwm2dcl; 189 sfr_register pwm2dch; 190 PM_RW pm_rw; 191 CWG cwg; 192 NCO2 nco; 193 CLCDATA clcdata; 194 CLC clc1; 195 sfr_register vregcon; 196 197 PicPortIOCRegister *m_porta; 198 PicTrisRegister *m_trisa; 199 PicLatchRegister *m_lata; 200 WPU *m_wpu; 201 IOC *m_iocap; 202 IOC *m_iocan; 203 IOCxF *m_iocaf; 204 205 CLC_BASE::data_in lcxdx[8] 206 { 207 CLC_BASE::LC1, CLC_BASE::CLCxIN0, CLC_BASE::CLCxIN1, CLC_BASE::PWM1, 208 CLC_BASE::PWM2, CLC_BASE::NCOx, CLC_BASE::FOSCLK, CLC_BASE::LFINTOSC 209 }; get_pir2()210 virtual PIR *get_pir2() { return nullptr; } get_pir1()211 virtual PIR *get_pir1() { return pir1; } get_pir_set()212 virtual PIR_SET *get_pir_set() { return &pir_set_def; } 213 214 215 P10F32X(const char *_name = nullptr, const char *desc = nullptr); 216 ~P10F32X(); 217 virtual void option_new_bits_6_7(unsigned int bits); 218 virtual void create_symbols(); 219 virtual void create_sfr_map(); 220 virtual void create_iopin_map(); 221 virtual void create(); 222 virtual void create_config_memory(); 223 virtual bool set_config_word(unsigned int address, unsigned int cfg_word); swdten_active()224 virtual bool swdten_active() 225 { 226 return (wdt_flag == 1); // WDTCON can enable WDT 227 } 228 virtual void enter_sleep(); 229 virtual void exit_sleep(); 230 /* 231 virtual void set_out_of_range_pm(unsigned int address, unsigned int value); 232 */ 233 }; 234 235 236 class P10F320 : public P10F32X 237 { 238 public: 239 P10F320(const char *_name = nullptr, const char *desc = nullptr); 240 ~P10F320(); isa()241 virtual PROCESSOR_TYPE isa() 242 { 243 return _P10F320_; 244 } 245 static Processor *construct(const char *name); register_memory_size()246 virtual unsigned int register_memory_size() const 247 { 248 return 0x80; 249 } program_memory_size()250 virtual unsigned int program_memory_size() const 251 { 252 return 0x100; 253 } 254 //RRRvirtual void create(); get_device_id()255 virtual unsigned int get_device_id() 256 { 257 return (0x29 << 8) | (0x5 << 5); 258 } 259 }; 260 261 262 class P10LF320 : public P10F320 263 { 264 public: P10F320(_name,desc)265 P10LF320(const char *_name = nullptr, const char *desc = nullptr) : P10F320(_name, desc) {} ~P10LF320()266 ~P10LF320() {} isa()267 virtual PROCESSOR_TYPE isa() 268 { 269 return _P10LF320_; 270 } 271 static Processor *construct(const char *name); get_device_id()272 virtual unsigned int get_device_id() 273 { 274 return (0x29 << 8) | (0x7 << 5); 275 } 276 }; 277 278 279 class P10F322 : public P10F32X 280 { 281 public: 282 P10F322(const char *_name = nullptr, const char *desc = nullptr); 283 ~P10F322(); isa()284 virtual PROCESSOR_TYPE isa() 285 { 286 return _P10F322_; 287 } 288 static Processor *construct(const char *name); register_memory_size()289 virtual unsigned int register_memory_size() const 290 { 291 return 0x80; 292 } program_memory_size()293 virtual unsigned int program_memory_size() const 294 { 295 return 0x200; 296 } 297 //RRRvirtual void create(); get_device_id()298 virtual unsigned int get_device_id() 299 { 300 return (0x29 << 8) | (0x4 << 5); 301 } 302 }; 303 304 305 class P10LF322 : public P10F322 306 { 307 public: P10F322(_name,desc)308 P10LF322(const char *_name = nullptr, const char *desc = nullptr) : P10F322(_name, desc) {} ~P10LF322()309 ~P10LF322() {} isa()310 virtual PROCESSOR_TYPE isa() 311 { 312 return _P10LF322_; 313 } 314 static Processor *construct(const char *name); get_device_id()315 virtual unsigned int get_device_id() 316 { 317 return (0x29 << 8) | (0x6 << 5); 318 } 319 }; 320 321 322 #endif 323