| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/openrisc/ |
| H A D | translate.c | 204 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
222 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
238 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
253 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
256 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
275 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
279 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
306 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
315 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
366 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/openrisc/ |
| H A D | translate.c | 208 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
226 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
242 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
257 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
260 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
279 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
283 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
310 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
319 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
370 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu/qemu-6.2.0/target/openrisc/ |
| H A D | translate.c | 208 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
226 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
242 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
257 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
260 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
279 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
283 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
310 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
319 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
370 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/target/openrisc/ |
| H A D | translate.c | 209 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add()
227 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
243 tcg_gen_and_tl(cpu_sr_ov, cpu_sr_ov, cpu_sr_cy); in gen_sub()
258 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul()
261 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_mul()
280 tcg_gen_or_tl(t0, srcb, cpu_sr_ov); in gen_div()
284 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_div()
311 tcg_gen_movi_tl(cpu_sr_ov, 0); in gen_muld()
320 tcg_gen_neg_tl(cpu_sr_ov, cpu_sr_ov); in gen_muld()
371 tcg_gen_mov_i64(cpu_sr_ov, t1); in gen_mac()
[all …]
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