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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/doc/
H A Dmd.texi1091 If the predicate accepts a unary operator, the constraint applies to the
1352 Integer that is valid as an immediate operand in a data processing
2364 This instruction pattern moves data with that machine mode from operand
3351 a load or store instruction (@pxref{Stack Checking}), define this pattern
4190 standard binary or unary arithmetic operation or a bit-field operation,
4895 (define_attr "type" "branch,fp,load,store,arith" @dots{})
5258 (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
5510 The first one is a data dependence delay determining @dfn{instruction
5515 instruction execution start). Taking the data dependence delays into
5677 "fp" 1 0 (eq_attr "type" "sp_fp") 4 4 [(eq_attr "type" "dp_fp")])
[all …]
H A Dgccint.info4184 The table below begins with constants, moves on to unary expressions,
4276 These nodes represent unary negation of the single operand, for
4836 An RTX code for a unary arithmetic operation, such as `NEG',
8638 If the predicate accepts a unary operator, the constraint applies to
8870 processing instruction. That is, an integer in the range 0
16122 processing.
22081 FPBIT = fp-bit.c
22085 fp-bit.c: $(srcdir)/config/fp-bit.c
22086 echo '#define FLOAT' > fp-bit.c
22087 cat $(srcdir)/config/fp-bit.c >> fp-bit.c
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/doc/
H A Dmd.texi1091 If the predicate accepts a unary operator, the constraint applies to the
1352 Integer that is valid as an immediate operand in a data processing
2364 This instruction pattern moves data with that machine mode from operand
3351 a load or store instruction (@pxref{Stack Checking}), define this pattern
4190 standard binary or unary arithmetic operation or a bit-field operation,
4895 (define_attr "type" "branch,fp,load,store,arith" @dots{})
5258 (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
5510 The first one is a data dependence delay determining @dfn{instruction
5515 instruction execution start). Taking the data dependence delays into
5677 "fp" 1 0 (eq_attr "type" "sp_fp") 4 4 [(eq_attr "type" "dp_fp")])
[all …]
H A Dgccint.info4184 The table below begins with constants, moves on to unary expressions,
4276 These nodes represent unary negation of the single operand, for
4836 An RTX code for a unary arithmetic operation, such as `NEG',
8638 If the predicate accepts a unary operator, the constraint applies to
8870 processing instruction. That is, an integer in the range 0
16122 processing.
22081 FPBIT = fp-bit.c
22085 fp-bit.c: $(srcdir)/config/fp-bit.c
22086 echo '#define FLOAT' > fp-bit.c
22087 cat $(srcdir)/config/fp-bit.c >> fp-bit.c
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/doc/
H A Dmd.texi1384 If the predicate accepts a unary operator, the constraint applies to the
1653 Integer that is valid as an immediate operand in a data processing
2865 This instruction pattern moves data with that machine mode from operand
3974 a load or store instruction (@pxref{Stack Checking}), define this pattern
4991 standard binary or unary arithmetic operation or a bit-field operation,
5696 (define_attr "type" "branch,fp,load,store,arith" @dots{})
6059 (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
6226 on the type of instruction being generated, not on data flow between the
6311 The first one is a data dependence delay determining @dfn{instruction
6314 complex cases when the instruction execution starts even when the data
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/nasm/doc/
H A Dnasmdoc.src119 \IR{+ opunary} \c{+} operator, unary
122 \IR{- opunary} \c{-} operator, unary
123 \IR{! opunary} \c{!} operator, unary
822 contain no instruction but define a label without a trailing colon.
1005 NASM command-line processing will get confused by the two
1720 The \c{%use fp} standard macro package contains a set of convenience
2474 instruction; for example, you might want to define
3152 will not, since \c{-1} contains two tokens: the unary minus operator
4275 \H{pkg_fp} \i\c\{fp}: Floating-point macros
5364 \b \c{data} and \c{bss} define the section to be a data section,
[all …]
/dports/devel/nasm/nasm-2.15.05/doc/
H A Dnasmdoc.src125 \IR{+ opunary} \c{+} operator, unary
128 \IR{- opunary} \c{-} operator, unary
1004 NASM command-line processing will get confused by the two
1803 The \c{%use fp} standard macro package contains a set of convenience
1961 \S{expmul} \I{operators, unary}\i{Unary Operators}
2774 instruction; for example, you might want to define
3447 will not, since \c{-1} contains two tokens: the unary minus operator
4134 other processing takes place.
4692 \H{pkg_fp} \i\c\{fp}: Floating-point macros
5868 \b \c{data} and \c{bss} define the section to be a data section,
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/nasm/doc/
H A Dnasmdoc.src125 \IR{+ opunary} \c{+} operator, unary
128 \IR{- opunary} \c{-} operator, unary
1002 NASM command-line processing will get confused by the two
1774 The \c{%use fp} standard macro package contains a set of convenience
1932 \S{expmul} \I{operators, unary}\i{Unary Operators}
2707 instruction; for example, you might want to define
3380 will not, since \c{-1} contains two tokens: the unary minus operator
4067 other processing takes place.
4625 \H{pkg_fp} \i\c\{fp}: Floating-point macros
5794 \b \c{data} and \c{bss} define the section to be a data section,
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/nasm/
H A DChangeLog248 * Handle rounding of denorms correctly; make fp overflow a warning
272 * Must define types before using them
530 * Fix handling of DO; support unary + for floating-point numbers
762 * Fixed RIP address processing ambiguity found by Charles Crayne.
1191 * Handle rounding of denorms correctly; make fp overflow a warning
1215 * Must define types before using them
1473 * Fix handling of DO; support unary + for floating-point numbers
2064 * Handle rounding of denorms correctly; make fp overflow a warning
2088 * Must define types before using them
2346 * Fix handling of DO; support unary + for floating-point numbers
[all …]
/dports/devel/nasm/nasm-2.15.05/
H A DChangeLog248 * Handle rounding of denorms correctly; make fp overflow a warning
272 * Must define types before using them
530 * Fix handling of DO; support unary + for floating-point numbers
762 * Fixed RIP address processing ambiguity found by Charles Crayne.
1191 * Handle rounding of denorms correctly; make fp overflow a warning
1215 * Must define types before using them
1473 * Fix handling of DO; support unary + for floating-point numbers
2064 * Handle rounding of denorms correctly; make fp overflow a warning
2088 * Must define types before using them
2346 * Fix handling of DO; support unary + for floating-point numbers
[all …]
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/doc/
H A Dgcc.info3920 * The unary plus operator.
7589 further processing.
8840 SCCVN processing. If this limit is hit, SCCVN processing for
10867 `fp'
11162 `neon-fp-armv8', and `crypto-neon-fp-armv8'.
11952 `-mfast-fp'
13477 `-mieee-fp'
17601 `fp'
21264 * unary arithmetic operators (`+', `-', `!')
26298 processing instruction. That is, an integer in the range 0
[all …]
H A Dgccint.info4900 ARM target supports `-mfpu=fp-armv8 -mfloat-abi=softfp'. Some
4904 ARM target supports `-mfpu=neon-fp-armv8 -mfloat-abi=softfp'.
6345 later processing.
14655 for a unary expression.
16707 1. Once to initialize any local data needed while processing BB
19619 processing instruction. That is, an integer in the range 0
19791 Matches control register values to switch fp mode, which are
25056 (define_attr "type" "branch,fp,load,store,arith" ...)
27517 If a target needs per-function specific data it should define the type
29918 target must support at least 2 data registers, but should define 4
[all …]
H A Dmd.texi1439 If the predicate accepts a unary operator, the constraint applies to the
1740 Integer that is valid as an immediate operand in a data processing
1909 Matches control register values to switch fp mode, which are encapsulated in
4197 This instruction pattern moves data with that machine mode from operand
6922 standard binary or unary arithmetic operation or a bit-field operation,
7635 (define_attr "type" "branch,fp,load,store,arith" @dots{})
8069 (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
8236 on the type of instruction being generated, not on data flow between the
8321 The first one is a data dependence delay determining @dfn{instruction
8324 complex cases when the instruction execution starts even when the data
[all …]
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/doc/
H A Dgccint.info4804 ARM target supports '-mfpu=fp-armv8 -mfloat-abi=softfp'. Some
4808 ARM target supports '-mfpu=neon-fp-armv8 -mfloat-abi=softfp'. Some
6252 later processing.
11382 for a unary expression.
13379 1. Once to initialize any local data needed while processing BB
19700 processing instruction. That is, an integer in the range 0 to
19870 Matches control register values to switch fp mode, which are
25286 (define_attr "type" "branch,fp,load,store,arith" ...)
37173 convention when processing system header files, but when processing
38491 'template' structure declarations that define data structures that are
[all …]
H A Dgcc.info1138 -mforce-fp-as-gp -mforbid-fp-as-gp
4067 * The unary plus operator.
7808 processing.
9114 SCCVN processing. If this limit is hit, SCCVN processing for
11256 'fp'
12758 '-mfast-fp'
14367 '-mieee-fp'
19167 'fp'
22906 * unary arithmetic operators ('+', '-', '!')
28134 processing instruction. That is, an integer in the range 0 to
[all …]
H A Dmd.texi1439 If the predicate accepts a unary operator, the constraint applies to the
1785 Integer that is valid as an immediate operand in a data processing
1954 Matches control register values to switch fp mode, which are encapsulated in
4466 This instruction pattern moves data with that machine mode from operand
7204 standard binary or unary arithmetic operation or a bit-field operation,
7920 (define_attr "type" "branch,fp,load,store,arith" @dots{})
8359 (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
8567 on the type of instruction being generated, not on data flow between the
8652 The first one is a data dependence delay determining @dfn{instruction
8655 complex cases when the instruction execution starts even when the data
[all …]
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/arc/
H A Darc.md65 ;; H fp 16-bit constant
76 ;; -> prefetch instruction
1673 ;; a bit test instruction, along with a special short load instruction
1821 [(set_attr "type" "unary,unary,unary,unary,load,load")
1846 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
1871 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
3358 [(set_attr "type" "unary,unary")
3377 [(set_attr "type" "unary,unary")
4680 ; Since the demise of REG_N_SETS as reliable data readily available to the
5226 ;; If hardware floating point is available, don't define a negdf pattern;
[all …]
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/arc/
H A Darc.md65 ;; H fp 16-bit constant
76 ;; -> prefetch instruction
1674 ;; a bit test instruction, along with a special short load instruction
1822 [(set_attr "type" "unary,unary,unary,unary,load,load")
1847 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
1872 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
3351 [(set_attr "type" "unary,unary")
3370 [(set_attr "type" "unary,unary")
4684 ; Since the demise of REG_N_SETS as reliable data readily available to the
5202 ;; If hardware floating point is available, don't define a negdf pattern;
[all …]
/dports/lang/gcc11/gcc-11.2.0/gcc/config/arc/
H A Darc.md65 ;; H fp 16-bit constant
76 ;; -> prefetch instruction
1673 ;; a bit test instruction, along with a special short load instruction
1821 [(set_attr "type" "unary,unary,unary,unary,load,load")
1846 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
1871 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
3358 [(set_attr "type" "unary,unary")
3377 [(set_attr "type" "unary,unary")
4680 ; Since the demise of REG_N_SETS as reliable data readily available to the
5226 ;; If hardware floating point is available, don't define a negdf pattern;
[all …]
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/arc/
H A Darc.md65 ;; H fp 16-bit constant
76 ;; -> prefetch instruction
1673 ;; a bit test instruction, along with a special short load instruction
1821 [(set_attr "type" "unary,unary,unary,unary,load,load")
1846 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
1871 [(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
3358 [(set_attr "type" "unary,unary")
3377 [(set_attr "type" "unary,unary")
4680 ; Since the demise of REG_N_SETS as reliable data readily available to the
5226 ;; If hardware floating point is available, don't define a negdf pattern;
[all …]
/dports/lang/gcc48/gcc-4.8.5/gcc/doc/
H A Dgccint.info4903 ARM target supports `-mfpu=fp-armv8 -mfloat-abi=softfp'. Some
4907 ARM target supports `-mfpu=neon-fp-armv8 -mfloat-abi=softfp'.
6372 later processing.
14682 for a unary expression.
16734 1. Once to initialize any local data needed while processing BB
19646 processing instruction. That is, an integer in the range 0
19818 Matches control register values to switch fp mode, which are
25162 (define_attr "type" "branch,fp,load,store,arith" ...)
27623 If a target needs per-function specific data it should define the type
30024 target must support at least 2 data registers, but should define 4
[all …]
/dports/devel/gnulibiberty/binutils-2.37/gas/doc/
H A Das.info406 omit forms processing
3483 '.bundle_unlock' directives define a "bundle-locked" instruction
4664 Comm::) to define aligned local common data.
7367 'fp'
9650 '%fp'
11946 This option specifies instruction syntax when processing
15733 define the defaults.
15766 9.27.8 Directive to mark data as an instruction
16536 The serialize unary operator '&', the fractional division operator
16675 instruction in order to ensure the correct processing of
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/gas/doc/
H A Das.info406 omit forms processing
3483 '.bundle_unlock' directives define a "bundle-locked" instruction
4664 Comm::) to define aligned local common data.
7367 'fp'
9650 '%fp'
11946 This option specifies instruction syntax when processing
15733 define the defaults.
15766 9.27.8 Directive to mark data as an instruction
16536 The serialize unary operator '&', the fractional division operator
16675 instruction in order to ensure the correct processing of
[all …]
/dports/devel/binutils/binutils-2.37/gas/doc/
H A Das.info406 omit forms processing
3483 '.bundle_unlock' directives define a "bundle-locked" instruction
4664 Comm::) to define aligned local common data.
7367 'fp'
9650 '%fp'
11946 This option specifies instruction syntax when processing
15733 define the defaults.
15766 9.27.8 Directive to mark data as an instruction
16536 The serialize unary operator '&', the fractional division operator
16675 instruction in order to ensure the correct processing of
[all …]
/dports/lang/gcc10/gcc-10.3.0/gcc/doc/
H A Dgccint.info5073 code using the options '-march=armv8-a -mfpu=neon-fp-armv8
5083 ARM target supports '-mfpu=fp-armv8 -mfloat-abi=softfp'. Some
7104 later processing.
15775 1. Once to initialize any local data needed while processing BB
22574 processing instruction. That is, an integer in the range 0 to
29010 (define_attr "type" "branch,fp,load,store,arith" ...)
31659 If a target needs per-function specific data it should define the type
34023 target must support at least 2 data registers, but should define 4
41786 convention when processing system header files, but when processing
43218 'template' structure declarations that define data structures that are
[all …]

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