/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
H A D | sem-switch.c | 1089 if (NESI (* FLD (i_sr), 0)) { in CASE() 1112 if (NESI (* FLD (i_sr), 0)) { in CASE() 1135 if (NESI (* FLD (i_sr), 0)) { in CASE() 1158 if (NESI (* FLD (i_sr), 0)) { in CASE() 1185 temp1 = ANDSI (* FLD (i_sr), -4); in CASE() 1426 temp1 = ADDSI (* FLD (i_sr), 4); in CASE() 1434 * FLD (i_sr) = opval; in CASE() 1707 SI opval = * FLD (i_sr); in CASE() 1840 USI opval = * FLD (i_sr); in CASE() 1859 SI opval = NEGSI (* FLD (i_sr)); in CASE() [all …]
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H A D | sem.c | 1011 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1036 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1061 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1086 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1115 temp1 = ANDSI (* FLD (i_sr), -4); in SEM_FN_NAME() 1380 temp1 = ADDSI (* FLD (i_sr), 4); in SEM_FN_NAME() 1388 * FLD (i_sr) = opval; in SEM_FN_NAME() 1689 SI opval = * FLD (i_sr); in SEM_FN_NAME() 1836 USI opval = * FLD (i_sr); in SEM_FN_NAME() 1857 SI opval = NEGSI (* FLD (i_sr)); in SEM_FN_NAME() [all …]
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H A D | sem2-switch.c | 1450 if (NESI (* FLD (i_sr), 0)) { in CASE() 1473 if (NESI (* FLD (i_sr), 0)) { in CASE() 1496 if (NESI (* FLD (i_sr), 0)) { in CASE() 1519 if (NESI (* FLD (i_sr), 0)) { in CASE() 1542 if (NESI (* FLD (i_sr), 0)) { in CASE() 1565 if (NESI (* FLD (i_sr), 0)) { in CASE() 1588 if (NESI (* FLD (i_sr), 0)) { in CASE() 2029 * FLD (i_sr) = opval; in CASE() 2302 SI opval = * FLD (i_sr); in CASE() 3164 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() [all …]
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H A D | semx-switch.c | 1443 if (NESI (* FLD (i_sr), 0)) { in CASE() 1466 if (NESI (* FLD (i_sr), 0)) { in CASE() 1489 if (NESI (* FLD (i_sr), 0)) { in CASE() 1512 if (NESI (* FLD (i_sr), 0)) { in CASE() 1535 if (NESI (* FLD (i_sr), 0)) { in CASE() 1861 * FLD (i_sr) = opval; in CASE() 2134 SI opval = * FLD (i_sr); in CASE() 2996 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() 3015 …SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* … in CASE() 4441 * FLD (i_sr) = OPRND (sr); in CASE() [all …]
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H A D | decode.c | 502 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 535 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 568 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 601 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 661 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 694 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 725 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1015 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1042 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1068 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() [all …]
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/dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/ |
H A D | sem-switch.c | 1085 if (NESI (* FLD (i_sr), 0)) { in CASE() 1108 if (NESI (* FLD (i_sr), 0)) { in CASE() 1131 if (NESI (* FLD (i_sr), 0)) { in CASE() 1154 if (NESI (* FLD (i_sr), 0)) { in CASE() 1181 temp1 = ANDSI (* FLD (i_sr), -4); in CASE() 1422 temp1 = ADDSI (* FLD (i_sr), 4); in CASE() 1430 * FLD (i_sr) = opval; in CASE() 1703 SI opval = * FLD (i_sr); in CASE() 1836 USI opval = * FLD (i_sr); in CASE() 1855 SI opval = NEGSI (* FLD (i_sr)); in CASE() [all …]
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H A D | sem.c | 1007 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1032 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1057 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1082 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1111 temp1 = ANDSI (* FLD (i_sr), -4); in SEM_FN_NAME() 1376 temp1 = ADDSI (* FLD (i_sr), 4); in SEM_FN_NAME() 1384 * FLD (i_sr) = opval; in SEM_FN_NAME() 1685 SI opval = * FLD (i_sr); in SEM_FN_NAME() 1832 USI opval = * FLD (i_sr); in SEM_FN_NAME() 1853 SI opval = NEGSI (* FLD (i_sr)); in SEM_FN_NAME() [all …]
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H A D | sem2-switch.c | 1446 if (NESI (* FLD (i_sr), 0)) { in CASE() 1469 if (NESI (* FLD (i_sr), 0)) { in CASE() 1492 if (NESI (* FLD (i_sr), 0)) { in CASE() 1515 if (NESI (* FLD (i_sr), 0)) { in CASE() 1538 if (NESI (* FLD (i_sr), 0)) { in CASE() 1561 if (NESI (* FLD (i_sr), 0)) { in CASE() 1584 if (NESI (* FLD (i_sr), 0)) { in CASE() 2025 * FLD (i_sr) = opval; in CASE() 2298 SI opval = * FLD (i_sr); in CASE() 3160 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() [all …]
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H A D | semx-switch.c | 1439 if (NESI (* FLD (i_sr), 0)) { in CASE() 1462 if (NESI (* FLD (i_sr), 0)) { in CASE() 1485 if (NESI (* FLD (i_sr), 0)) { in CASE() 1508 if (NESI (* FLD (i_sr), 0)) { in CASE() 1531 if (NESI (* FLD (i_sr), 0)) { in CASE() 1857 * FLD (i_sr) = opval; in CASE() 2130 SI opval = * FLD (i_sr); in CASE() 2992 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() 3011 …SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* … in CASE() 4437 * FLD (i_sr) = OPRND (sr); in CASE() [all …]
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H A D | decode.c | 602 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 635 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 668 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 701 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 761 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 794 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 825 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1115 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1142 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1168 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() [all …]
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H A D | decode2.c | 791 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 824 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 857 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 890 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 950 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 983 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1014 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1377 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1404 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1429 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() [all …]
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H A D | decodex.c | 732 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 765 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 798 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 831 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 891 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 924 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 955 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1318 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1345 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1370 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() [all …]
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/dports/devel/gdb761/gdb-7.6.1/sim/m32r/ |
H A D | sem-switch.c | 1084 if (NESI (* FLD (i_sr), 0)) { in CASE() 1107 if (NESI (* FLD (i_sr), 0)) { in CASE() 1130 if (NESI (* FLD (i_sr), 0)) { in CASE() 1153 if (NESI (* FLD (i_sr), 0)) { in CASE() 1180 temp1 = ANDSI (* FLD (i_sr), -4); in CASE() 1421 temp1 = ADDSI (* FLD (i_sr), 4); in CASE() 1429 * FLD (i_sr) = opval; in CASE() 1702 SI opval = * FLD (i_sr); in CASE() 1835 USI opval = * FLD (i_sr); in CASE() 1854 SI opval = NEGSI (* FLD (i_sr)); in CASE() [all …]
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H A D | sem.c | 1006 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1031 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1056 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1081 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1110 temp1 = ANDSI (* FLD (i_sr), -4); in SEM_FN_NAME() 1375 temp1 = ADDSI (* FLD (i_sr), 4); in SEM_FN_NAME() 1383 * FLD (i_sr) = opval; in SEM_FN_NAME() 1684 SI opval = * FLD (i_sr); in SEM_FN_NAME() 1831 USI opval = * FLD (i_sr); in SEM_FN_NAME() 1852 SI opval = NEGSI (* FLD (i_sr)); in SEM_FN_NAME() [all …]
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H A D | sem2-switch.c | 1445 if (NESI (* FLD (i_sr), 0)) { in CASE() 1468 if (NESI (* FLD (i_sr), 0)) { in CASE() 1491 if (NESI (* FLD (i_sr), 0)) { in CASE() 1514 if (NESI (* FLD (i_sr), 0)) { in CASE() 1537 if (NESI (* FLD (i_sr), 0)) { in CASE() 1560 if (NESI (* FLD (i_sr), 0)) { in CASE() 1583 if (NESI (* FLD (i_sr), 0)) { in CASE() 2024 * FLD (i_sr) = opval; in CASE() 2297 SI opval = * FLD (i_sr); in CASE() 3159 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() [all …]
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H A D | semx-switch.c | 1438 if (NESI (* FLD (i_sr), 0)) { in CASE() 1461 if (NESI (* FLD (i_sr), 0)) { in CASE() 1484 if (NESI (* FLD (i_sr), 0)) { in CASE() 1507 if (NESI (* FLD (i_sr), 0)) { in CASE() 1530 if (NESI (* FLD (i_sr), 0)) { in CASE() 1856 * FLD (i_sr) = opval; in CASE() 2129 SI opval = * FLD (i_sr); in CASE() 2991 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() 3010 …SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* … in CASE() 4436 * FLD (i_sr) = OPRND (sr); in CASE() [all …]
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H A D | decode.c | 601 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 634 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 667 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 700 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 760 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 793 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 824 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1114 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1141 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1167 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() [all …]
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H A D | decodex.c | 731 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 764 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 797 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 830 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 890 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 923 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 954 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1317 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1344 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1369 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() [all …]
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H A D | decode2.c | 790 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 823 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 856 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 889 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 949 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 982 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1013 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1376 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1403 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() 1428 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32r2f_decode() [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
H A D | sem-switch.c | 1089 if (NESI (* FLD (i_sr), 0)) { in CASE() 1112 if (NESI (* FLD (i_sr), 0)) { in CASE() 1135 if (NESI (* FLD (i_sr), 0)) { in CASE() 1158 if (NESI (* FLD (i_sr), 0)) { in CASE() 1185 temp1 = ANDSI (* FLD (i_sr), -4); in CASE() 1426 temp1 = ADDSI (* FLD (i_sr), 4); in CASE() 1434 * FLD (i_sr) = opval; in CASE() 1707 SI opval = * FLD (i_sr); in CASE() 1840 USI opval = * FLD (i_sr); in CASE() 1859 SI opval = NEGSI (* FLD (i_sr)); in CASE() [all …]
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H A D | sem.c | 1011 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1036 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1061 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1086 if (NESI (* FLD (i_sr), 0)) { in SEM_FN_NAME() 1115 temp1 = ANDSI (* FLD (i_sr), -4); in SEM_FN_NAME() 1380 temp1 = ADDSI (* FLD (i_sr), 4); in SEM_FN_NAME() 1388 * FLD (i_sr) = opval; in SEM_FN_NAME() 1689 SI opval = * FLD (i_sr); in SEM_FN_NAME() 1836 USI opval = * FLD (i_sr); in SEM_FN_NAME() 1857 SI opval = NEGSI (* FLD (i_sr)); in SEM_FN_NAME() [all …]
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H A D | sem2-switch.c | 1450 if (NESI (* FLD (i_sr), 0)) { in CASE() 1473 if (NESI (* FLD (i_sr), 0)) { in CASE() 1496 if (NESI (* FLD (i_sr), 0)) { in CASE() 1519 if (NESI (* FLD (i_sr), 0)) { in CASE() 1542 if (NESI (* FLD (i_sr), 0)) { in CASE() 1565 if (NESI (* FLD (i_sr), 0)) { in CASE() 1588 if (NESI (* FLD (i_sr), 0)) { in CASE() 2029 * FLD (i_sr) = opval; in CASE() 2302 SI opval = * FLD (i_sr); in CASE() 3164 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() [all …]
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H A D | semx-switch.c | 1443 if (NESI (* FLD (i_sr), 0)) { in CASE() 1466 if (NESI (* FLD (i_sr), 0)) { in CASE() 1489 if (NESI (* FLD (i_sr), 0)) { in CASE() 1512 if (NESI (* FLD (i_sr), 0)) { in CASE() 1535 if (NESI (* FLD (i_sr), 0)) { in CASE() 1861 * FLD (i_sr) = opval; in CASE() 2134 SI opval = * FLD (i_sr); in CASE() 2996 …SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_s… in CASE() 3015 …SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* … in CASE() 4441 * FLD (i_sr) = OPRND (sr); in CASE() [all …]
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H A D | decode.c | 502 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 535 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 568 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 601 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 661 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 694 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 725 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1015 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1042 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() 1068 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rbf_decode() [all …]
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H A D | decodex.c | 602 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 635 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 668 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 701 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 761 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 794 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 825 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1188 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1215 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() 1240 FLD (i_sr) = & CPU (h_gr)[f_r2]; in m32rxf_decode() [all …]
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