1 /* Simulator instruction semantics for m32rbf.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6
7 This file is part of the GNU simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #define WANT_CPU m32rbf
26 #define WANT_CPU_M32RBF
27
28 #include "sim-main.h"
29 #include "cgen-mem.h"
30 #include "cgen-ops.h"
31
32 #undef GET_ATTR
33 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
34 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
35 #else
36 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
37 #endif
38
39 /* This is used so that we can compile two copies of the semantic code,
40 one with full feature support and one without that runs fast(er).
41 FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
42 #if FAST_P
43 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
44 #undef TRACE_RESULT
45 #define TRACE_RESULT(cpu, abuf, name, type, val)
46 #else
47 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
48 #endif
49
50 /* x-invalid: --invalid-- */
51
52 static SEM_PC
SEM_FN_NAME(m32rbf,x_invalid)53 SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
54 {
55 #define FLD(f) abuf->fields.fmt_empty.f
56 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
57 int UNUSED written = 0;
58 IADDR UNUSED pc = abuf->addr;
59 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
60
61 {
62 /* Update the recorded pc in the cpu state struct.
63 Only necessary for WITH_SCACHE case, but to avoid the
64 conditional compilation .... */
65 SET_H_PC (pc);
66 /* Virtual insns have zero size. Overwrite vpc with address of next insn
67 using the default-insn-bitsize spec. When executing insns in parallel
68 we may want to queue the fault and continue execution. */
69 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
70 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
71 }
72
73 return vpc;
74 #undef FLD
75 }
76
77 /* x-after: --after-- */
78
79 static SEM_PC
SEM_FN_NAME(m32rbf,x_after)80 SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
81 {
82 #define FLD(f) abuf->fields.fmt_empty.f
83 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
84 int UNUSED written = 0;
85 IADDR UNUSED pc = abuf->addr;
86 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
87
88 {
89 #if WITH_SCACHE_PBB_M32RBF
90 m32rbf_pbb_after (current_cpu, sem_arg);
91 #endif
92 }
93
94 return vpc;
95 #undef FLD
96 }
97
98 /* x-before: --before-- */
99
100 static SEM_PC
SEM_FN_NAME(m32rbf,x_before)101 SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
102 {
103 #define FLD(f) abuf->fields.fmt_empty.f
104 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
105 int UNUSED written = 0;
106 IADDR UNUSED pc = abuf->addr;
107 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
108
109 {
110 #if WITH_SCACHE_PBB_M32RBF
111 m32rbf_pbb_before (current_cpu, sem_arg);
112 #endif
113 }
114
115 return vpc;
116 #undef FLD
117 }
118
119 /* x-cti-chain: --cti-chain-- */
120
121 static SEM_PC
SEM_FN_NAME(m32rbf,x_cti_chain)122 SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
123 {
124 #define FLD(f) abuf->fields.fmt_empty.f
125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
126 int UNUSED written = 0;
127 IADDR UNUSED pc = abuf->addr;
128 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
129
130 {
131 #if WITH_SCACHE_PBB_M32RBF
132 #ifdef DEFINE_SWITCH
133 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
134 pbb_br_type, pbb_br_npc);
135 BREAK (sem);
136 #else
137 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
138 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
139 CPU_PBB_BR_TYPE (current_cpu),
140 CPU_PBB_BR_NPC (current_cpu));
141 #endif
142 #endif
143 }
144
145 return vpc;
146 #undef FLD
147 }
148
149 /* x-chain: --chain-- */
150
151 static SEM_PC
SEM_FN_NAME(m32rbf,x_chain)152 SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
153 {
154 #define FLD(f) abuf->fields.fmt_empty.f
155 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
156 int UNUSED written = 0;
157 IADDR UNUSED pc = abuf->addr;
158 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
159
160 {
161 #if WITH_SCACHE_PBB_M32RBF
162 vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
163 #ifdef DEFINE_SWITCH
164 BREAK (sem);
165 #endif
166 #endif
167 }
168
169 return vpc;
170 #undef FLD
171 }
172
173 /* x-begin: --begin-- */
174
175 static SEM_PC
SEM_FN_NAME(m32rbf,x_begin)176 SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
177 {
178 #define FLD(f) abuf->fields.fmt_empty.f
179 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
180 int UNUSED written = 0;
181 IADDR UNUSED pc = abuf->addr;
182 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
183
184 {
185 #if WITH_SCACHE_PBB_M32RBF
186 #if defined DEFINE_SWITCH || defined FAST_P
187 /* In the switch case FAST_P is a constant, allowing several optimizations
188 in any called inline functions. */
189 vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
190 #else
191 #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
192 vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
193 #else
194 vpc = m32rbf_pbb_begin (current_cpu, 0);
195 #endif
196 #endif
197 #endif
198 }
199
200 return vpc;
201 #undef FLD
202 }
203
204 /* add: add $dr,$sr */
205
206 static SEM_PC
SEM_FN_NAME(m32rbf,add)207 SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
208 {
209 #define FLD(f) abuf->fields.sfmt_add.f
210 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
211 int UNUSED written = 0;
212 IADDR UNUSED pc = abuf->addr;
213 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
214
215 {
216 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
217 * FLD (i_dr) = opval;
218 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
219 }
220
221 return vpc;
222 #undef FLD
223 }
224
225 /* add3: add3 $dr,$sr,$hash$slo16 */
226
227 static SEM_PC
SEM_FN_NAME(m32rbf,add3)228 SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
229 {
230 #define FLD(f) abuf->fields.sfmt_add3.f
231 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
232 int UNUSED written = 0;
233 IADDR UNUSED pc = abuf->addr;
234 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
235
236 {
237 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
238 * FLD (i_dr) = opval;
239 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
240 }
241
242 return vpc;
243 #undef FLD
244 }
245
246 /* and: and $dr,$sr */
247
248 static SEM_PC
SEM_FN_NAME(m32rbf,and)249 SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
250 {
251 #define FLD(f) abuf->fields.sfmt_add.f
252 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
253 int UNUSED written = 0;
254 IADDR UNUSED pc = abuf->addr;
255 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
256
257 {
258 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
259 * FLD (i_dr) = opval;
260 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
261 }
262
263 return vpc;
264 #undef FLD
265 }
266
267 /* and3: and3 $dr,$sr,$uimm16 */
268
269 static SEM_PC
SEM_FN_NAME(m32rbf,and3)270 SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
271 {
272 #define FLD(f) abuf->fields.sfmt_and3.f
273 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
274 int UNUSED written = 0;
275 IADDR UNUSED pc = abuf->addr;
276 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
277
278 {
279 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
280 * FLD (i_dr) = opval;
281 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
282 }
283
284 return vpc;
285 #undef FLD
286 }
287
288 /* or: or $dr,$sr */
289
290 static SEM_PC
SEM_FN_NAME(m32rbf,or)291 SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
292 {
293 #define FLD(f) abuf->fields.sfmt_add.f
294 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
295 int UNUSED written = 0;
296 IADDR UNUSED pc = abuf->addr;
297 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
298
299 {
300 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
301 * FLD (i_dr) = opval;
302 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
303 }
304
305 return vpc;
306 #undef FLD
307 }
308
309 /* or3: or3 $dr,$sr,$hash$ulo16 */
310
311 static SEM_PC
SEM_FN_NAME(m32rbf,or3)312 SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
313 {
314 #define FLD(f) abuf->fields.sfmt_and3.f
315 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
316 int UNUSED written = 0;
317 IADDR UNUSED pc = abuf->addr;
318 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
319
320 {
321 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
322 * FLD (i_dr) = opval;
323 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
324 }
325
326 return vpc;
327 #undef FLD
328 }
329
330 /* xor: xor $dr,$sr */
331
332 static SEM_PC
SEM_FN_NAME(m32rbf,xor)333 SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
334 {
335 #define FLD(f) abuf->fields.sfmt_add.f
336 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
337 int UNUSED written = 0;
338 IADDR UNUSED pc = abuf->addr;
339 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
340
341 {
342 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
343 * FLD (i_dr) = opval;
344 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
345 }
346
347 return vpc;
348 #undef FLD
349 }
350
351 /* xor3: xor3 $dr,$sr,$uimm16 */
352
353 static SEM_PC
SEM_FN_NAME(m32rbf,xor3)354 SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
355 {
356 #define FLD(f) abuf->fields.sfmt_and3.f
357 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
358 int UNUSED written = 0;
359 IADDR UNUSED pc = abuf->addr;
360 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
361
362 {
363 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
364 * FLD (i_dr) = opval;
365 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
366 }
367
368 return vpc;
369 #undef FLD
370 }
371
372 /* addi: addi $dr,$simm8 */
373
374 static SEM_PC
SEM_FN_NAME(m32rbf,addi)375 SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
376 {
377 #define FLD(f) abuf->fields.sfmt_addi.f
378 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
379 int UNUSED written = 0;
380 IADDR UNUSED pc = abuf->addr;
381 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
382
383 {
384 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
385 * FLD (i_dr) = opval;
386 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
387 }
388
389 return vpc;
390 #undef FLD
391 }
392
393 /* addv: addv $dr,$sr */
394
395 static SEM_PC
SEM_FN_NAME(m32rbf,addv)396 SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
397 {
398 #define FLD(f) abuf->fields.sfmt_add.f
399 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
400 int UNUSED written = 0;
401 IADDR UNUSED pc = abuf->addr;
402 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
403
404 {
405 SI temp0;BI temp1;
406 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
407 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
408 {
409 SI opval = temp0;
410 * FLD (i_dr) = opval;
411 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
412 }
413 {
414 BI opval = temp1;
415 CPU (h_cond) = opval;
416 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
417 }
418 }
419
420 return vpc;
421 #undef FLD
422 }
423
424 /* addv3: addv3 $dr,$sr,$simm16 */
425
426 static SEM_PC
SEM_FN_NAME(m32rbf,addv3)427 SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
428 {
429 #define FLD(f) abuf->fields.sfmt_add3.f
430 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
431 int UNUSED written = 0;
432 IADDR UNUSED pc = abuf->addr;
433 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
434
435 {
436 SI temp0;BI temp1;
437 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
438 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
439 {
440 SI opval = temp0;
441 * FLD (i_dr) = opval;
442 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
443 }
444 {
445 BI opval = temp1;
446 CPU (h_cond) = opval;
447 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
448 }
449 }
450
451 return vpc;
452 #undef FLD
453 }
454
455 /* addx: addx $dr,$sr */
456
457 static SEM_PC
SEM_FN_NAME(m32rbf,addx)458 SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
459 {
460 #define FLD(f) abuf->fields.sfmt_add.f
461 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
462 int UNUSED written = 0;
463 IADDR UNUSED pc = abuf->addr;
464 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
465
466 {
467 SI temp0;BI temp1;
468 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
469 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
470 {
471 SI opval = temp0;
472 * FLD (i_dr) = opval;
473 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
474 }
475 {
476 BI opval = temp1;
477 CPU (h_cond) = opval;
478 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
479 }
480 }
481
482 return vpc;
483 #undef FLD
484 }
485
486 /* bc8: bc.s $disp8 */
487
488 static SEM_PC
SEM_FN_NAME(m32rbf,bc8)489 SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
490 {
491 #define FLD(f) abuf->fields.sfmt_bl8.f
492 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
493 int UNUSED written = 0;
494 IADDR UNUSED pc = abuf->addr;
495 SEM_BRANCH_INIT
496 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
497
498 if (CPU (h_cond)) {
499 {
500 USI opval = FLD (i_disp8);
501 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
502 written |= (1 << 2);
503 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
504 }
505 }
506
507 abuf->written = written;
508 SEM_BRANCH_FINI (vpc);
509 return vpc;
510 #undef FLD
511 }
512
513 /* bc24: bc.l $disp24 */
514
515 static SEM_PC
SEM_FN_NAME(m32rbf,bc24)516 SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
517 {
518 #define FLD(f) abuf->fields.sfmt_bl24.f
519 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
520 int UNUSED written = 0;
521 IADDR UNUSED pc = abuf->addr;
522 SEM_BRANCH_INIT
523 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
524
525 if (CPU (h_cond)) {
526 {
527 USI opval = FLD (i_disp24);
528 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
529 written |= (1 << 2);
530 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
531 }
532 }
533
534 abuf->written = written;
535 SEM_BRANCH_FINI (vpc);
536 return vpc;
537 #undef FLD
538 }
539
540 /* beq: beq $src1,$src2,$disp16 */
541
542 static SEM_PC
SEM_FN_NAME(m32rbf,beq)543 SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
544 {
545 #define FLD(f) abuf->fields.sfmt_beq.f
546 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
547 int UNUSED written = 0;
548 IADDR UNUSED pc = abuf->addr;
549 SEM_BRANCH_INIT
550 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
551
552 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
553 {
554 USI opval = FLD (i_disp16);
555 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
556 written |= (1 << 3);
557 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
558 }
559 }
560
561 abuf->written = written;
562 SEM_BRANCH_FINI (vpc);
563 return vpc;
564 #undef FLD
565 }
566
567 /* beqz: beqz $src2,$disp16 */
568
569 static SEM_PC
SEM_FN_NAME(m32rbf,beqz)570 SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
571 {
572 #define FLD(f) abuf->fields.sfmt_beq.f
573 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
574 int UNUSED written = 0;
575 IADDR UNUSED pc = abuf->addr;
576 SEM_BRANCH_INIT
577 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
578
579 if (EQSI (* FLD (i_src2), 0)) {
580 {
581 USI opval = FLD (i_disp16);
582 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
583 written |= (1 << 2);
584 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
585 }
586 }
587
588 abuf->written = written;
589 SEM_BRANCH_FINI (vpc);
590 return vpc;
591 #undef FLD
592 }
593
594 /* bgez: bgez $src2,$disp16 */
595
596 static SEM_PC
SEM_FN_NAME(m32rbf,bgez)597 SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
598 {
599 #define FLD(f) abuf->fields.sfmt_beq.f
600 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
601 int UNUSED written = 0;
602 IADDR UNUSED pc = abuf->addr;
603 SEM_BRANCH_INIT
604 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
605
606 if (GESI (* FLD (i_src2), 0)) {
607 {
608 USI opval = FLD (i_disp16);
609 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
610 written |= (1 << 2);
611 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
612 }
613 }
614
615 abuf->written = written;
616 SEM_BRANCH_FINI (vpc);
617 return vpc;
618 #undef FLD
619 }
620
621 /* bgtz: bgtz $src2,$disp16 */
622
623 static SEM_PC
SEM_FN_NAME(m32rbf,bgtz)624 SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
625 {
626 #define FLD(f) abuf->fields.sfmt_beq.f
627 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
628 int UNUSED written = 0;
629 IADDR UNUSED pc = abuf->addr;
630 SEM_BRANCH_INIT
631 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
632
633 if (GTSI (* FLD (i_src2), 0)) {
634 {
635 USI opval = FLD (i_disp16);
636 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
637 written |= (1 << 2);
638 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
639 }
640 }
641
642 abuf->written = written;
643 SEM_BRANCH_FINI (vpc);
644 return vpc;
645 #undef FLD
646 }
647
648 /* blez: blez $src2,$disp16 */
649
650 static SEM_PC
SEM_FN_NAME(m32rbf,blez)651 SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
652 {
653 #define FLD(f) abuf->fields.sfmt_beq.f
654 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
655 int UNUSED written = 0;
656 IADDR UNUSED pc = abuf->addr;
657 SEM_BRANCH_INIT
658 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
659
660 if (LESI (* FLD (i_src2), 0)) {
661 {
662 USI opval = FLD (i_disp16);
663 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
664 written |= (1 << 2);
665 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
666 }
667 }
668
669 abuf->written = written;
670 SEM_BRANCH_FINI (vpc);
671 return vpc;
672 #undef FLD
673 }
674
675 /* bltz: bltz $src2,$disp16 */
676
677 static SEM_PC
SEM_FN_NAME(m32rbf,bltz)678 SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
679 {
680 #define FLD(f) abuf->fields.sfmt_beq.f
681 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
682 int UNUSED written = 0;
683 IADDR UNUSED pc = abuf->addr;
684 SEM_BRANCH_INIT
685 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
686
687 if (LTSI (* FLD (i_src2), 0)) {
688 {
689 USI opval = FLD (i_disp16);
690 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
691 written |= (1 << 2);
692 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
693 }
694 }
695
696 abuf->written = written;
697 SEM_BRANCH_FINI (vpc);
698 return vpc;
699 #undef FLD
700 }
701
702 /* bnez: bnez $src2,$disp16 */
703
704 static SEM_PC
SEM_FN_NAME(m32rbf,bnez)705 SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
706 {
707 #define FLD(f) abuf->fields.sfmt_beq.f
708 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
709 int UNUSED written = 0;
710 IADDR UNUSED pc = abuf->addr;
711 SEM_BRANCH_INIT
712 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
713
714 if (NESI (* FLD (i_src2), 0)) {
715 {
716 USI opval = FLD (i_disp16);
717 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
718 written |= (1 << 2);
719 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
720 }
721 }
722
723 abuf->written = written;
724 SEM_BRANCH_FINI (vpc);
725 return vpc;
726 #undef FLD
727 }
728
729 /* bl8: bl.s $disp8 */
730
731 static SEM_PC
SEM_FN_NAME(m32rbf,bl8)732 SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
733 {
734 #define FLD(f) abuf->fields.sfmt_bl8.f
735 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
736 int UNUSED written = 0;
737 IADDR UNUSED pc = abuf->addr;
738 SEM_BRANCH_INIT
739 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
740
741 {
742 {
743 SI opval = ADDSI (ANDSI (pc, -4), 4);
744 CPU (h_gr[((UINT) 14)]) = opval;
745 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
746 }
747 {
748 USI opval = FLD (i_disp8);
749 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
750 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
751 }
752 }
753
754 SEM_BRANCH_FINI (vpc);
755 return vpc;
756 #undef FLD
757 }
758
759 /* bl24: bl.l $disp24 */
760
761 static SEM_PC
SEM_FN_NAME(m32rbf,bl24)762 SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
763 {
764 #define FLD(f) abuf->fields.sfmt_bl24.f
765 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
766 int UNUSED written = 0;
767 IADDR UNUSED pc = abuf->addr;
768 SEM_BRANCH_INIT
769 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
770
771 {
772 {
773 SI opval = ADDSI (pc, 4);
774 CPU (h_gr[((UINT) 14)]) = opval;
775 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
776 }
777 {
778 USI opval = FLD (i_disp24);
779 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
780 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
781 }
782 }
783
784 SEM_BRANCH_FINI (vpc);
785 return vpc;
786 #undef FLD
787 }
788
789 /* bnc8: bnc.s $disp8 */
790
791 static SEM_PC
SEM_FN_NAME(m32rbf,bnc8)792 SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
793 {
794 #define FLD(f) abuf->fields.sfmt_bl8.f
795 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
796 int UNUSED written = 0;
797 IADDR UNUSED pc = abuf->addr;
798 SEM_BRANCH_INIT
799 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
800
801 if (NOTBI (CPU (h_cond))) {
802 {
803 USI opval = FLD (i_disp8);
804 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
805 written |= (1 << 2);
806 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
807 }
808 }
809
810 abuf->written = written;
811 SEM_BRANCH_FINI (vpc);
812 return vpc;
813 #undef FLD
814 }
815
816 /* bnc24: bnc.l $disp24 */
817
818 static SEM_PC
SEM_FN_NAME(m32rbf,bnc24)819 SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
820 {
821 #define FLD(f) abuf->fields.sfmt_bl24.f
822 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
823 int UNUSED written = 0;
824 IADDR UNUSED pc = abuf->addr;
825 SEM_BRANCH_INIT
826 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
827
828 if (NOTBI (CPU (h_cond))) {
829 {
830 USI opval = FLD (i_disp24);
831 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
832 written |= (1 << 2);
833 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
834 }
835 }
836
837 abuf->written = written;
838 SEM_BRANCH_FINI (vpc);
839 return vpc;
840 #undef FLD
841 }
842
843 /* bne: bne $src1,$src2,$disp16 */
844
845 static SEM_PC
SEM_FN_NAME(m32rbf,bne)846 SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
847 {
848 #define FLD(f) abuf->fields.sfmt_beq.f
849 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
850 int UNUSED written = 0;
851 IADDR UNUSED pc = abuf->addr;
852 SEM_BRANCH_INIT
853 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
854
855 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
856 {
857 USI opval = FLD (i_disp16);
858 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
859 written |= (1 << 3);
860 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
861 }
862 }
863
864 abuf->written = written;
865 SEM_BRANCH_FINI (vpc);
866 return vpc;
867 #undef FLD
868 }
869
870 /* bra8: bra.s $disp8 */
871
872 static SEM_PC
SEM_FN_NAME(m32rbf,bra8)873 SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
874 {
875 #define FLD(f) abuf->fields.sfmt_bl8.f
876 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
877 int UNUSED written = 0;
878 IADDR UNUSED pc = abuf->addr;
879 SEM_BRANCH_INIT
880 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
881
882 {
883 USI opval = FLD (i_disp8);
884 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
885 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
886 }
887
888 SEM_BRANCH_FINI (vpc);
889 return vpc;
890 #undef FLD
891 }
892
893 /* bra24: bra.l $disp24 */
894
895 static SEM_PC
SEM_FN_NAME(m32rbf,bra24)896 SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
897 {
898 #define FLD(f) abuf->fields.sfmt_bl24.f
899 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
900 int UNUSED written = 0;
901 IADDR UNUSED pc = abuf->addr;
902 SEM_BRANCH_INIT
903 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
904
905 {
906 USI opval = FLD (i_disp24);
907 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
908 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
909 }
910
911 SEM_BRANCH_FINI (vpc);
912 return vpc;
913 #undef FLD
914 }
915
916 /* cmp: cmp $src1,$src2 */
917
918 static SEM_PC
SEM_FN_NAME(m32rbf,cmp)919 SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
920 {
921 #define FLD(f) abuf->fields.sfmt_st_plus.f
922 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
923 int UNUSED written = 0;
924 IADDR UNUSED pc = abuf->addr;
925 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
926
927 {
928 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
929 CPU (h_cond) = opval;
930 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
931 }
932
933 return vpc;
934 #undef FLD
935 }
936
937 /* cmpi: cmpi $src2,$simm16 */
938
939 static SEM_PC
SEM_FN_NAME(m32rbf,cmpi)940 SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
941 {
942 #define FLD(f) abuf->fields.sfmt_st_d.f
943 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
944 int UNUSED written = 0;
945 IADDR UNUSED pc = abuf->addr;
946 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
947
948 {
949 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
950 CPU (h_cond) = opval;
951 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
952 }
953
954 return vpc;
955 #undef FLD
956 }
957
958 /* cmpu: cmpu $src1,$src2 */
959
960 static SEM_PC
SEM_FN_NAME(m32rbf,cmpu)961 SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
962 {
963 #define FLD(f) abuf->fields.sfmt_st_plus.f
964 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
965 int UNUSED written = 0;
966 IADDR UNUSED pc = abuf->addr;
967 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
968
969 {
970 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
971 CPU (h_cond) = opval;
972 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
973 }
974
975 return vpc;
976 #undef FLD
977 }
978
979 /* cmpui: cmpui $src2,$simm16 */
980
981 static SEM_PC
SEM_FN_NAME(m32rbf,cmpui)982 SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
983 {
984 #define FLD(f) abuf->fields.sfmt_st_d.f
985 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
986 int UNUSED written = 0;
987 IADDR UNUSED pc = abuf->addr;
988 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
989
990 {
991 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
992 CPU (h_cond) = opval;
993 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
994 }
995
996 return vpc;
997 #undef FLD
998 }
999
1000 /* div: div $dr,$sr */
1001
1002 static SEM_PC
SEM_FN_NAME(m32rbf,div)1003 SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1004 {
1005 #define FLD(f) abuf->fields.sfmt_add.f
1006 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1007 int UNUSED written = 0;
1008 IADDR UNUSED pc = abuf->addr;
1009 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1010
1011 if (NESI (* FLD (i_sr), 0)) {
1012 {
1013 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1014 * FLD (i_dr) = opval;
1015 written |= (1 << 2);
1016 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1017 }
1018 }
1019
1020 abuf->written = written;
1021 return vpc;
1022 #undef FLD
1023 }
1024
1025 /* divu: divu $dr,$sr */
1026
1027 static SEM_PC
SEM_FN_NAME(m32rbf,divu)1028 SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1029 {
1030 #define FLD(f) abuf->fields.sfmt_add.f
1031 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1032 int UNUSED written = 0;
1033 IADDR UNUSED pc = abuf->addr;
1034 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1035
1036 if (NESI (* FLD (i_sr), 0)) {
1037 {
1038 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1039 * FLD (i_dr) = opval;
1040 written |= (1 << 2);
1041 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1042 }
1043 }
1044
1045 abuf->written = written;
1046 return vpc;
1047 #undef FLD
1048 }
1049
1050 /* rem: rem $dr,$sr */
1051
1052 static SEM_PC
SEM_FN_NAME(m32rbf,rem)1053 SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1054 {
1055 #define FLD(f) abuf->fields.sfmt_add.f
1056 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1057 int UNUSED written = 0;
1058 IADDR UNUSED pc = abuf->addr;
1059 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1060
1061 if (NESI (* FLD (i_sr), 0)) {
1062 {
1063 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1064 * FLD (i_dr) = opval;
1065 written |= (1 << 2);
1066 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1067 }
1068 }
1069
1070 abuf->written = written;
1071 return vpc;
1072 #undef FLD
1073 }
1074
1075 /* remu: remu $dr,$sr */
1076
1077 static SEM_PC
SEM_FN_NAME(m32rbf,remu)1078 SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1079 {
1080 #define FLD(f) abuf->fields.sfmt_add.f
1081 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1082 int UNUSED written = 0;
1083 IADDR UNUSED pc = abuf->addr;
1084 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1085
1086 if (NESI (* FLD (i_sr), 0)) {
1087 {
1088 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1089 * FLD (i_dr) = opval;
1090 written |= (1 << 2);
1091 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1092 }
1093 }
1094
1095 abuf->written = written;
1096 return vpc;
1097 #undef FLD
1098 }
1099
1100 /* jl: jl $sr */
1101
1102 static SEM_PC
SEM_FN_NAME(m32rbf,jl)1103 SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1104 {
1105 #define FLD(f) abuf->fields.sfmt_jl.f
1106 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1107 int UNUSED written = 0;
1108 IADDR UNUSED pc = abuf->addr;
1109 SEM_BRANCH_INIT
1110 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1111
1112 {
1113 SI temp0;USI temp1;
1114 temp0 = ADDSI (ANDSI (pc, -4), 4);
1115 temp1 = ANDSI (* FLD (i_sr), -4);
1116 {
1117 SI opval = temp0;
1118 CPU (h_gr[((UINT) 14)]) = opval;
1119 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1120 }
1121 {
1122 USI opval = temp1;
1123 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1124 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1125 }
1126 }
1127
1128 SEM_BRANCH_FINI (vpc);
1129 return vpc;
1130 #undef FLD
1131 }
1132
1133 /* jmp: jmp $sr */
1134
1135 static SEM_PC
SEM_FN_NAME(m32rbf,jmp)1136 SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1137 {
1138 #define FLD(f) abuf->fields.sfmt_jl.f
1139 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1140 int UNUSED written = 0;
1141 IADDR UNUSED pc = abuf->addr;
1142 SEM_BRANCH_INIT
1143 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1144
1145 {
1146 USI opval = ANDSI (* FLD (i_sr), -4);
1147 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1148 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1149 }
1150
1151 SEM_BRANCH_FINI (vpc);
1152 return vpc;
1153 #undef FLD
1154 }
1155
1156 /* ld: ld $dr,@$sr */
1157
1158 static SEM_PC
SEM_FN_NAME(m32rbf,ld)1159 SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1160 {
1161 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1162 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1163 int UNUSED written = 0;
1164 IADDR UNUSED pc = abuf->addr;
1165 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1166
1167 {
1168 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1169 * FLD (i_dr) = opval;
1170 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1171 }
1172
1173 return vpc;
1174 #undef FLD
1175 }
1176
1177 /* ld-d: ld $dr,@($slo16,$sr) */
1178
1179 static SEM_PC
SEM_FN_NAME(m32rbf,ld_d)1180 SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1181 {
1182 #define FLD(f) abuf->fields.sfmt_add3.f
1183 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1184 int UNUSED written = 0;
1185 IADDR UNUSED pc = abuf->addr;
1186 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1187
1188 {
1189 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1190 * FLD (i_dr) = opval;
1191 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1192 }
1193
1194 return vpc;
1195 #undef FLD
1196 }
1197
1198 /* ldb: ldb $dr,@$sr */
1199
1200 static SEM_PC
SEM_FN_NAME(m32rbf,ldb)1201 SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1202 {
1203 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1204 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1205 int UNUSED written = 0;
1206 IADDR UNUSED pc = abuf->addr;
1207 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1208
1209 {
1210 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1211 * FLD (i_dr) = opval;
1212 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1213 }
1214
1215 return vpc;
1216 #undef FLD
1217 }
1218
1219 /* ldb-d: ldb $dr,@($slo16,$sr) */
1220
1221 static SEM_PC
SEM_FN_NAME(m32rbf,ldb_d)1222 SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1223 {
1224 #define FLD(f) abuf->fields.sfmt_add3.f
1225 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1226 int UNUSED written = 0;
1227 IADDR UNUSED pc = abuf->addr;
1228 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1229
1230 {
1231 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1232 * FLD (i_dr) = opval;
1233 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1234 }
1235
1236 return vpc;
1237 #undef FLD
1238 }
1239
1240 /* ldh: ldh $dr,@$sr */
1241
1242 static SEM_PC
SEM_FN_NAME(m32rbf,ldh)1243 SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1244 {
1245 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1246 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1247 int UNUSED written = 0;
1248 IADDR UNUSED pc = abuf->addr;
1249 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1250
1251 {
1252 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1253 * FLD (i_dr) = opval;
1254 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1255 }
1256
1257 return vpc;
1258 #undef FLD
1259 }
1260
1261 /* ldh-d: ldh $dr,@($slo16,$sr) */
1262
1263 static SEM_PC
SEM_FN_NAME(m32rbf,ldh_d)1264 SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1265 {
1266 #define FLD(f) abuf->fields.sfmt_add3.f
1267 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1268 int UNUSED written = 0;
1269 IADDR UNUSED pc = abuf->addr;
1270 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1271
1272 {
1273 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1274 * FLD (i_dr) = opval;
1275 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1276 }
1277
1278 return vpc;
1279 #undef FLD
1280 }
1281
1282 /* ldub: ldub $dr,@$sr */
1283
1284 static SEM_PC
SEM_FN_NAME(m32rbf,ldub)1285 SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1286 {
1287 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1288 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1289 int UNUSED written = 0;
1290 IADDR UNUSED pc = abuf->addr;
1291 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1292
1293 {
1294 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1295 * FLD (i_dr) = opval;
1296 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1297 }
1298
1299 return vpc;
1300 #undef FLD
1301 }
1302
1303 /* ldub-d: ldub $dr,@($slo16,$sr) */
1304
1305 static SEM_PC
SEM_FN_NAME(m32rbf,ldub_d)1306 SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1307 {
1308 #define FLD(f) abuf->fields.sfmt_add3.f
1309 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1310 int UNUSED written = 0;
1311 IADDR UNUSED pc = abuf->addr;
1312 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1313
1314 {
1315 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1316 * FLD (i_dr) = opval;
1317 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1318 }
1319
1320 return vpc;
1321 #undef FLD
1322 }
1323
1324 /* lduh: lduh $dr,@$sr */
1325
1326 static SEM_PC
SEM_FN_NAME(m32rbf,lduh)1327 SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1328 {
1329 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1330 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1331 int UNUSED written = 0;
1332 IADDR UNUSED pc = abuf->addr;
1333 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1334
1335 {
1336 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1337 * FLD (i_dr) = opval;
1338 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1339 }
1340
1341 return vpc;
1342 #undef FLD
1343 }
1344
1345 /* lduh-d: lduh $dr,@($slo16,$sr) */
1346
1347 static SEM_PC
SEM_FN_NAME(m32rbf,lduh_d)1348 SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1349 {
1350 #define FLD(f) abuf->fields.sfmt_add3.f
1351 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1352 int UNUSED written = 0;
1353 IADDR UNUSED pc = abuf->addr;
1354 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1355
1356 {
1357 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1358 * FLD (i_dr) = opval;
1359 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1360 }
1361
1362 return vpc;
1363 #undef FLD
1364 }
1365
1366 /* ld-plus: ld $dr,@$sr+ */
1367
1368 static SEM_PC
SEM_FN_NAME(m32rbf,ld_plus)1369 SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1370 {
1371 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1372 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1373 int UNUSED written = 0;
1374 IADDR UNUSED pc = abuf->addr;
1375 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1376
1377 {
1378 SI temp0;SI temp1;
1379 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1380 temp1 = ADDSI (* FLD (i_sr), 4);
1381 {
1382 SI opval = temp0;
1383 * FLD (i_dr) = opval;
1384 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1385 }
1386 {
1387 SI opval = temp1;
1388 * FLD (i_sr) = opval;
1389 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1390 }
1391 }
1392
1393 return vpc;
1394 #undef FLD
1395 }
1396
1397 /* ld24: ld24 $dr,$uimm24 */
1398
1399 static SEM_PC
SEM_FN_NAME(m32rbf,ld24)1400 SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1401 {
1402 #define FLD(f) abuf->fields.sfmt_ld24.f
1403 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1404 int UNUSED written = 0;
1405 IADDR UNUSED pc = abuf->addr;
1406 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1407
1408 {
1409 SI opval = FLD (i_uimm24);
1410 * FLD (i_dr) = opval;
1411 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1412 }
1413
1414 return vpc;
1415 #undef FLD
1416 }
1417
1418 /* ldi8: ldi8 $dr,$simm8 */
1419
1420 static SEM_PC
SEM_FN_NAME(m32rbf,ldi8)1421 SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1422 {
1423 #define FLD(f) abuf->fields.sfmt_addi.f
1424 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1425 int UNUSED written = 0;
1426 IADDR UNUSED pc = abuf->addr;
1427 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1428
1429 {
1430 SI opval = FLD (f_simm8);
1431 * FLD (i_dr) = opval;
1432 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1433 }
1434
1435 return vpc;
1436 #undef FLD
1437 }
1438
1439 /* ldi16: ldi16 $dr,$hash$slo16 */
1440
1441 static SEM_PC
SEM_FN_NAME(m32rbf,ldi16)1442 SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1443 {
1444 #define FLD(f) abuf->fields.sfmt_add3.f
1445 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1446 int UNUSED written = 0;
1447 IADDR UNUSED pc = abuf->addr;
1448 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1449
1450 {
1451 SI opval = FLD (f_simm16);
1452 * FLD (i_dr) = opval;
1453 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1454 }
1455
1456 return vpc;
1457 #undef FLD
1458 }
1459
1460 /* lock: lock $dr,@$sr */
1461
1462 static SEM_PC
SEM_FN_NAME(m32rbf,lock)1463 SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1464 {
1465 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1466 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1467 int UNUSED written = 0;
1468 IADDR UNUSED pc = abuf->addr;
1469 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1470
1471 {
1472 {
1473 BI opval = 1;
1474 CPU (h_lock) = opval;
1475 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1476 }
1477 {
1478 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1479 * FLD (i_dr) = opval;
1480 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1481 }
1482 }
1483
1484 return vpc;
1485 #undef FLD
1486 }
1487
1488 /* machi: machi $src1,$src2 */
1489
1490 static SEM_PC
SEM_FN_NAME(m32rbf,machi)1491 SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1492 {
1493 #define FLD(f) abuf->fields.sfmt_st_plus.f
1494 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1495 int UNUSED written = 0;
1496 IADDR UNUSED pc = abuf->addr;
1497 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1498
1499 {
1500 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1501 SET_H_ACCUM (opval);
1502 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1503 }
1504
1505 return vpc;
1506 #undef FLD
1507 }
1508
1509 /* maclo: maclo $src1,$src2 */
1510
1511 static SEM_PC
SEM_FN_NAME(m32rbf,maclo)1512 SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1513 {
1514 #define FLD(f) abuf->fields.sfmt_st_plus.f
1515 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1516 int UNUSED written = 0;
1517 IADDR UNUSED pc = abuf->addr;
1518 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1519
1520 {
1521 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1522 SET_H_ACCUM (opval);
1523 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1524 }
1525
1526 return vpc;
1527 #undef FLD
1528 }
1529
1530 /* macwhi: macwhi $src1,$src2 */
1531
1532 static SEM_PC
SEM_FN_NAME(m32rbf,macwhi)1533 SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1534 {
1535 #define FLD(f) abuf->fields.sfmt_st_plus.f
1536 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1537 int UNUSED written = 0;
1538 IADDR UNUSED pc = abuf->addr;
1539 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1540
1541 {
1542 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1543 SET_H_ACCUM (opval);
1544 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1545 }
1546
1547 return vpc;
1548 #undef FLD
1549 }
1550
1551 /* macwlo: macwlo $src1,$src2 */
1552
1553 static SEM_PC
SEM_FN_NAME(m32rbf,macwlo)1554 SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1555 {
1556 #define FLD(f) abuf->fields.sfmt_st_plus.f
1557 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1558 int UNUSED written = 0;
1559 IADDR UNUSED pc = abuf->addr;
1560 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1561
1562 {
1563 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1564 SET_H_ACCUM (opval);
1565 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1566 }
1567
1568 return vpc;
1569 #undef FLD
1570 }
1571
1572 /* mul: mul $dr,$sr */
1573
1574 static SEM_PC
SEM_FN_NAME(m32rbf,mul)1575 SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1576 {
1577 #define FLD(f) abuf->fields.sfmt_add.f
1578 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1579 int UNUSED written = 0;
1580 IADDR UNUSED pc = abuf->addr;
1581 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1582
1583 {
1584 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
1585 * FLD (i_dr) = opval;
1586 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1587 }
1588
1589 return vpc;
1590 #undef FLD
1591 }
1592
1593 /* mulhi: mulhi $src1,$src2 */
1594
1595 static SEM_PC
SEM_FN_NAME(m32rbf,mulhi)1596 SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1597 {
1598 #define FLD(f) abuf->fields.sfmt_st_plus.f
1599 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1600 int UNUSED written = 0;
1601 IADDR UNUSED pc = abuf->addr;
1602 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1603
1604 {
1605 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
1606 SET_H_ACCUM (opval);
1607 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1608 }
1609
1610 return vpc;
1611 #undef FLD
1612 }
1613
1614 /* mullo: mullo $src1,$src2 */
1615
1616 static SEM_PC
SEM_FN_NAME(m32rbf,mullo)1617 SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1618 {
1619 #define FLD(f) abuf->fields.sfmt_st_plus.f
1620 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1621 int UNUSED written = 0;
1622 IADDR UNUSED pc = abuf->addr;
1623 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1624
1625 {
1626 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
1627 SET_H_ACCUM (opval);
1628 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1629 }
1630
1631 return vpc;
1632 #undef FLD
1633 }
1634
1635 /* mulwhi: mulwhi $src1,$src2 */
1636
1637 static SEM_PC
SEM_FN_NAME(m32rbf,mulwhi)1638 SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1639 {
1640 #define FLD(f) abuf->fields.sfmt_st_plus.f
1641 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1642 int UNUSED written = 0;
1643 IADDR UNUSED pc = abuf->addr;
1644 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1645
1646 {
1647 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
1648 SET_H_ACCUM (opval);
1649 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1650 }
1651
1652 return vpc;
1653 #undef FLD
1654 }
1655
1656 /* mulwlo: mulwlo $src1,$src2 */
1657
1658 static SEM_PC
SEM_FN_NAME(m32rbf,mulwlo)1659 SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1660 {
1661 #define FLD(f) abuf->fields.sfmt_st_plus.f
1662 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1663 int UNUSED written = 0;
1664 IADDR UNUSED pc = abuf->addr;
1665 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1666
1667 {
1668 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
1669 SET_H_ACCUM (opval);
1670 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1671 }
1672
1673 return vpc;
1674 #undef FLD
1675 }
1676
1677 /* mv: mv $dr,$sr */
1678
1679 static SEM_PC
SEM_FN_NAME(m32rbf,mv)1680 SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1681 {
1682 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1683 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1684 int UNUSED written = 0;
1685 IADDR UNUSED pc = abuf->addr;
1686 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1687
1688 {
1689 SI opval = * FLD (i_sr);
1690 * FLD (i_dr) = opval;
1691 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1692 }
1693
1694 return vpc;
1695 #undef FLD
1696 }
1697
1698 /* mvfachi: mvfachi $dr */
1699
1700 static SEM_PC
SEM_FN_NAME(m32rbf,mvfachi)1701 SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1702 {
1703 #define FLD(f) abuf->fields.sfmt_seth.f
1704 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1705 int UNUSED written = 0;
1706 IADDR UNUSED pc = abuf->addr;
1707 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1708
1709 {
1710 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
1711 * FLD (i_dr) = opval;
1712 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1713 }
1714
1715 return vpc;
1716 #undef FLD
1717 }
1718
1719 /* mvfaclo: mvfaclo $dr */
1720
1721 static SEM_PC
SEM_FN_NAME(m32rbf,mvfaclo)1722 SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1723 {
1724 #define FLD(f) abuf->fields.sfmt_seth.f
1725 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1726 int UNUSED written = 0;
1727 IADDR UNUSED pc = abuf->addr;
1728 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1729
1730 {
1731 SI opval = TRUNCDISI (GET_H_ACCUM ());
1732 * FLD (i_dr) = opval;
1733 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1734 }
1735
1736 return vpc;
1737 #undef FLD
1738 }
1739
1740 /* mvfacmi: mvfacmi $dr */
1741
1742 static SEM_PC
SEM_FN_NAME(m32rbf,mvfacmi)1743 SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1744 {
1745 #define FLD(f) abuf->fields.sfmt_seth.f
1746 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1747 int UNUSED written = 0;
1748 IADDR UNUSED pc = abuf->addr;
1749 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1750
1751 {
1752 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
1753 * FLD (i_dr) = opval;
1754 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1755 }
1756
1757 return vpc;
1758 #undef FLD
1759 }
1760
1761 /* mvfc: mvfc $dr,$scr */
1762
1763 static SEM_PC
SEM_FN_NAME(m32rbf,mvfc)1764 SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1765 {
1766 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1767 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1768 int UNUSED written = 0;
1769 IADDR UNUSED pc = abuf->addr;
1770 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1771
1772 {
1773 SI opval = GET_H_CR (FLD (f_r2));
1774 * FLD (i_dr) = opval;
1775 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1776 }
1777
1778 return vpc;
1779 #undef FLD
1780 }
1781
1782 /* mvtachi: mvtachi $src1 */
1783
1784 static SEM_PC
SEM_FN_NAME(m32rbf,mvtachi)1785 SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1786 {
1787 #define FLD(f) abuf->fields.sfmt_st_plus.f
1788 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1789 int UNUSED written = 0;
1790 IADDR UNUSED pc = abuf->addr;
1791 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1792
1793 {
1794 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
1795 SET_H_ACCUM (opval);
1796 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1797 }
1798
1799 return vpc;
1800 #undef FLD
1801 }
1802
1803 /* mvtaclo: mvtaclo $src1 */
1804
1805 static SEM_PC
SEM_FN_NAME(m32rbf,mvtaclo)1806 SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1807 {
1808 #define FLD(f) abuf->fields.sfmt_st_plus.f
1809 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1810 int UNUSED written = 0;
1811 IADDR UNUSED pc = abuf->addr;
1812 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1813
1814 {
1815 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
1816 SET_H_ACCUM (opval);
1817 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1818 }
1819
1820 return vpc;
1821 #undef FLD
1822 }
1823
1824 /* mvtc: mvtc $sr,$dcr */
1825
1826 static SEM_PC
SEM_FN_NAME(m32rbf,mvtc)1827 SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1828 {
1829 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1830 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1831 int UNUSED written = 0;
1832 IADDR UNUSED pc = abuf->addr;
1833 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1834
1835 {
1836 USI opval = * FLD (i_sr);
1837 SET_H_CR (FLD (f_r1), opval);
1838 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
1839 }
1840
1841 return vpc;
1842 #undef FLD
1843 }
1844
1845 /* neg: neg $dr,$sr */
1846
1847 static SEM_PC
SEM_FN_NAME(m32rbf,neg)1848 SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1849 {
1850 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1851 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1852 int UNUSED written = 0;
1853 IADDR UNUSED pc = abuf->addr;
1854 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1855
1856 {
1857 SI opval = NEGSI (* FLD (i_sr));
1858 * FLD (i_dr) = opval;
1859 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1860 }
1861
1862 return vpc;
1863 #undef FLD
1864 }
1865
1866 /* nop: nop */
1867
1868 static SEM_PC
SEM_FN_NAME(m32rbf,nop)1869 SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1870 {
1871 #define FLD(f) abuf->fields.fmt_empty.f
1872 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1873 int UNUSED written = 0;
1874 IADDR UNUSED pc = abuf->addr;
1875 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1876
1877 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
1878
1879 return vpc;
1880 #undef FLD
1881 }
1882
1883 /* not: not $dr,$sr */
1884
1885 static SEM_PC
SEM_FN_NAME(m32rbf,not)1886 SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1887 {
1888 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1889 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1890 int UNUSED written = 0;
1891 IADDR UNUSED pc = abuf->addr;
1892 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1893
1894 {
1895 SI opval = INVSI (* FLD (i_sr));
1896 * FLD (i_dr) = opval;
1897 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1898 }
1899
1900 return vpc;
1901 #undef FLD
1902 }
1903
1904 /* rac: rac */
1905
1906 static SEM_PC
SEM_FN_NAME(m32rbf,rac)1907 SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1908 {
1909 #define FLD(f) abuf->fields.fmt_empty.f
1910 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1911 int UNUSED written = 0;
1912 IADDR UNUSED pc = abuf->addr;
1913 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1914
1915 {
1916 DI tmp_tmp1;
1917 tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
1918 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
1919 {
1920 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
1921 SET_H_ACCUM (opval);
1922 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1923 }
1924 }
1925
1926 return vpc;
1927 #undef FLD
1928 }
1929
1930 /* rach: rach */
1931
1932 static SEM_PC
SEM_FN_NAME(m32rbf,rach)1933 SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1934 {
1935 #define FLD(f) abuf->fields.fmt_empty.f
1936 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1937 int UNUSED written = 0;
1938 IADDR UNUSED pc = abuf->addr;
1939 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1940
1941 {
1942 DI tmp_tmp1;
1943 tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
1944 if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
1945 tmp_tmp1 = MAKEDI (16383, 0x80000000);
1946 } else {
1947 if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
1948 tmp_tmp1 = MAKEDI (16760832, 0);
1949 } else {
1950 tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1951 }
1952 }
1953 tmp_tmp1 = SLLDI (tmp_tmp1, 1);
1954 {
1955 DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
1956 SET_H_ACCUM (opval);
1957 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1958 }
1959 }
1960
1961 return vpc;
1962 #undef FLD
1963 }
1964
1965 /* rte: rte */
1966
1967 static SEM_PC
SEM_FN_NAME(m32rbf,rte)1968 SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1969 {
1970 #define FLD(f) abuf->fields.fmt_empty.f
1971 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1972 int UNUSED written = 0;
1973 IADDR UNUSED pc = abuf->addr;
1974 SEM_BRANCH_INIT
1975 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1976
1977 {
1978 {
1979 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
1980 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1981 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1982 }
1983 {
1984 USI opval = GET_H_CR (((UINT) 14));
1985 SET_H_CR (((UINT) 6), opval);
1986 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
1987 }
1988 {
1989 UQI opval = CPU (h_bpsw);
1990 SET_H_PSW (opval);
1991 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
1992 }
1993 {
1994 UQI opval = CPU (h_bbpsw);
1995 CPU (h_bpsw) = opval;
1996 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
1997 }
1998 }
1999
2000 SEM_BRANCH_FINI (vpc);
2001 return vpc;
2002 #undef FLD
2003 }
2004
2005 /* seth: seth $dr,$hash$hi16 */
2006
2007 static SEM_PC
SEM_FN_NAME(m32rbf,seth)2008 SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2009 {
2010 #define FLD(f) abuf->fields.sfmt_seth.f
2011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2012 int UNUSED written = 0;
2013 IADDR UNUSED pc = abuf->addr;
2014 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2015
2016 {
2017 SI opval = SLLSI (FLD (f_hi16), 16);
2018 * FLD (i_dr) = opval;
2019 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2020 }
2021
2022 return vpc;
2023 #undef FLD
2024 }
2025
2026 /* sll: sll $dr,$sr */
2027
2028 static SEM_PC
SEM_FN_NAME(m32rbf,sll)2029 SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2030 {
2031 #define FLD(f) abuf->fields.sfmt_add.f
2032 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2033 int UNUSED written = 0;
2034 IADDR UNUSED pc = abuf->addr;
2035 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2036
2037 {
2038 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2039 * FLD (i_dr) = opval;
2040 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2041 }
2042
2043 return vpc;
2044 #undef FLD
2045 }
2046
2047 /* sll3: sll3 $dr,$sr,$simm16 */
2048
2049 static SEM_PC
SEM_FN_NAME(m32rbf,sll3)2050 SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2051 {
2052 #define FLD(f) abuf->fields.sfmt_add3.f
2053 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2054 int UNUSED written = 0;
2055 IADDR UNUSED pc = abuf->addr;
2056 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2057
2058 {
2059 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2060 * FLD (i_dr) = opval;
2061 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2062 }
2063
2064 return vpc;
2065 #undef FLD
2066 }
2067
2068 /* slli: slli $dr,$uimm5 */
2069
2070 static SEM_PC
SEM_FN_NAME(m32rbf,slli)2071 SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2072 {
2073 #define FLD(f) abuf->fields.sfmt_slli.f
2074 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2075 int UNUSED written = 0;
2076 IADDR UNUSED pc = abuf->addr;
2077 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2078
2079 {
2080 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2081 * FLD (i_dr) = opval;
2082 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2083 }
2084
2085 return vpc;
2086 #undef FLD
2087 }
2088
2089 /* sra: sra $dr,$sr */
2090
2091 static SEM_PC
SEM_FN_NAME(m32rbf,sra)2092 SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2093 {
2094 #define FLD(f) abuf->fields.sfmt_add.f
2095 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2096 int UNUSED written = 0;
2097 IADDR UNUSED pc = abuf->addr;
2098 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2099
2100 {
2101 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2102 * FLD (i_dr) = opval;
2103 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2104 }
2105
2106 return vpc;
2107 #undef FLD
2108 }
2109
2110 /* sra3: sra3 $dr,$sr,$simm16 */
2111
2112 static SEM_PC
SEM_FN_NAME(m32rbf,sra3)2113 SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2114 {
2115 #define FLD(f) abuf->fields.sfmt_add3.f
2116 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2117 int UNUSED written = 0;
2118 IADDR UNUSED pc = abuf->addr;
2119 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2120
2121 {
2122 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2123 * FLD (i_dr) = opval;
2124 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2125 }
2126
2127 return vpc;
2128 #undef FLD
2129 }
2130
2131 /* srai: srai $dr,$uimm5 */
2132
2133 static SEM_PC
SEM_FN_NAME(m32rbf,srai)2134 SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2135 {
2136 #define FLD(f) abuf->fields.sfmt_slli.f
2137 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2138 int UNUSED written = 0;
2139 IADDR UNUSED pc = abuf->addr;
2140 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2141
2142 {
2143 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2144 * FLD (i_dr) = opval;
2145 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2146 }
2147
2148 return vpc;
2149 #undef FLD
2150 }
2151
2152 /* srl: srl $dr,$sr */
2153
2154 static SEM_PC
SEM_FN_NAME(m32rbf,srl)2155 SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2156 {
2157 #define FLD(f) abuf->fields.sfmt_add.f
2158 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2159 int UNUSED written = 0;
2160 IADDR UNUSED pc = abuf->addr;
2161 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2162
2163 {
2164 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2165 * FLD (i_dr) = opval;
2166 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2167 }
2168
2169 return vpc;
2170 #undef FLD
2171 }
2172
2173 /* srl3: srl3 $dr,$sr,$simm16 */
2174
2175 static SEM_PC
SEM_FN_NAME(m32rbf,srl3)2176 SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2177 {
2178 #define FLD(f) abuf->fields.sfmt_add3.f
2179 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2180 int UNUSED written = 0;
2181 IADDR UNUSED pc = abuf->addr;
2182 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2183
2184 {
2185 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2186 * FLD (i_dr) = opval;
2187 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2188 }
2189
2190 return vpc;
2191 #undef FLD
2192 }
2193
2194 /* srli: srli $dr,$uimm5 */
2195
2196 static SEM_PC
SEM_FN_NAME(m32rbf,srli)2197 SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2198 {
2199 #define FLD(f) abuf->fields.sfmt_slli.f
2200 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2201 int UNUSED written = 0;
2202 IADDR UNUSED pc = abuf->addr;
2203 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2204
2205 {
2206 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2207 * FLD (i_dr) = opval;
2208 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2209 }
2210
2211 return vpc;
2212 #undef FLD
2213 }
2214
2215 /* st: st $src1,@$src2 */
2216
2217 static SEM_PC
SEM_FN_NAME(m32rbf,st)2218 SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2219 {
2220 #define FLD(f) abuf->fields.sfmt_st_plus.f
2221 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2222 int UNUSED written = 0;
2223 IADDR UNUSED pc = abuf->addr;
2224 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2225
2226 {
2227 SI opval = * FLD (i_src1);
2228 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2229 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2230 }
2231
2232 return vpc;
2233 #undef FLD
2234 }
2235
2236 /* st-d: st $src1,@($slo16,$src2) */
2237
2238 static SEM_PC
SEM_FN_NAME(m32rbf,st_d)2239 SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2240 {
2241 #define FLD(f) abuf->fields.sfmt_st_d.f
2242 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2243 int UNUSED written = 0;
2244 IADDR UNUSED pc = abuf->addr;
2245 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2246
2247 {
2248 SI opval = * FLD (i_src1);
2249 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2250 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2251 }
2252
2253 return vpc;
2254 #undef FLD
2255 }
2256
2257 /* stb: stb $src1,@$src2 */
2258
2259 static SEM_PC
SEM_FN_NAME(m32rbf,stb)2260 SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2261 {
2262 #define FLD(f) abuf->fields.sfmt_st_plus.f
2263 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2264 int UNUSED written = 0;
2265 IADDR UNUSED pc = abuf->addr;
2266 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2267
2268 {
2269 QI opval = * FLD (i_src1);
2270 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2271 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2272 }
2273
2274 return vpc;
2275 #undef FLD
2276 }
2277
2278 /* stb-d: stb $src1,@($slo16,$src2) */
2279
2280 static SEM_PC
SEM_FN_NAME(m32rbf,stb_d)2281 SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2282 {
2283 #define FLD(f) abuf->fields.sfmt_st_d.f
2284 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2285 int UNUSED written = 0;
2286 IADDR UNUSED pc = abuf->addr;
2287 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2288
2289 {
2290 QI opval = * FLD (i_src1);
2291 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2292 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2293 }
2294
2295 return vpc;
2296 #undef FLD
2297 }
2298
2299 /* sth: sth $src1,@$src2 */
2300
2301 static SEM_PC
SEM_FN_NAME(m32rbf,sth)2302 SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2303 {
2304 #define FLD(f) abuf->fields.sfmt_st_plus.f
2305 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2306 int UNUSED written = 0;
2307 IADDR UNUSED pc = abuf->addr;
2308 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2309
2310 {
2311 HI opval = * FLD (i_src1);
2312 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2313 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2314 }
2315
2316 return vpc;
2317 #undef FLD
2318 }
2319
2320 /* sth-d: sth $src1,@($slo16,$src2) */
2321
2322 static SEM_PC
SEM_FN_NAME(m32rbf,sth_d)2323 SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2324 {
2325 #define FLD(f) abuf->fields.sfmt_st_d.f
2326 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2327 int UNUSED written = 0;
2328 IADDR UNUSED pc = abuf->addr;
2329 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2330
2331 {
2332 HI opval = * FLD (i_src1);
2333 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2334 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2335 }
2336
2337 return vpc;
2338 #undef FLD
2339 }
2340
2341 /* st-plus: st $src1,@+$src2 */
2342
2343 static SEM_PC
SEM_FN_NAME(m32rbf,st_plus)2344 SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2345 {
2346 #define FLD(f) abuf->fields.sfmt_st_plus.f
2347 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2348 int UNUSED written = 0;
2349 IADDR UNUSED pc = abuf->addr;
2350 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2351
2352 {
2353 SI tmp_new_src2;
2354 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2355 {
2356 SI opval = * FLD (i_src1);
2357 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2358 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2359 }
2360 {
2361 SI opval = tmp_new_src2;
2362 * FLD (i_src2) = opval;
2363 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2364 }
2365 }
2366
2367 return vpc;
2368 #undef FLD
2369 }
2370
2371 /* st-minus: st $src1,@-$src2 */
2372
2373 static SEM_PC
SEM_FN_NAME(m32rbf,st_minus)2374 SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2375 {
2376 #define FLD(f) abuf->fields.sfmt_st_plus.f
2377 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2378 int UNUSED written = 0;
2379 IADDR UNUSED pc = abuf->addr;
2380 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2381
2382 {
2383 SI tmp_new_src2;
2384 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2385 {
2386 SI opval = * FLD (i_src1);
2387 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2388 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2389 }
2390 {
2391 SI opval = tmp_new_src2;
2392 * FLD (i_src2) = opval;
2393 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2394 }
2395 }
2396
2397 return vpc;
2398 #undef FLD
2399 }
2400
2401 /* sub: sub $dr,$sr */
2402
2403 static SEM_PC
SEM_FN_NAME(m32rbf,sub)2404 SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2405 {
2406 #define FLD(f) abuf->fields.sfmt_add.f
2407 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2408 int UNUSED written = 0;
2409 IADDR UNUSED pc = abuf->addr;
2410 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2411
2412 {
2413 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2414 * FLD (i_dr) = opval;
2415 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2416 }
2417
2418 return vpc;
2419 #undef FLD
2420 }
2421
2422 /* subv: subv $dr,$sr */
2423
2424 static SEM_PC
SEM_FN_NAME(m32rbf,subv)2425 SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2426 {
2427 #define FLD(f) abuf->fields.sfmt_add.f
2428 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2429 int UNUSED written = 0;
2430 IADDR UNUSED pc = abuf->addr;
2431 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2432
2433 {
2434 SI temp0;BI temp1;
2435 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2436 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2437 {
2438 SI opval = temp0;
2439 * FLD (i_dr) = opval;
2440 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2441 }
2442 {
2443 BI opval = temp1;
2444 CPU (h_cond) = opval;
2445 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2446 }
2447 }
2448
2449 return vpc;
2450 #undef FLD
2451 }
2452
2453 /* subx: subx $dr,$sr */
2454
2455 static SEM_PC
SEM_FN_NAME(m32rbf,subx)2456 SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2457 {
2458 #define FLD(f) abuf->fields.sfmt_add.f
2459 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2460 int UNUSED written = 0;
2461 IADDR UNUSED pc = abuf->addr;
2462 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2463
2464 {
2465 SI temp0;BI temp1;
2466 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2467 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2468 {
2469 SI opval = temp0;
2470 * FLD (i_dr) = opval;
2471 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2472 }
2473 {
2474 BI opval = temp1;
2475 CPU (h_cond) = opval;
2476 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2477 }
2478 }
2479
2480 return vpc;
2481 #undef FLD
2482 }
2483
2484 /* trap: trap $uimm4 */
2485
2486 static SEM_PC
SEM_FN_NAME(m32rbf,trap)2487 SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2488 {
2489 #define FLD(f) abuf->fields.sfmt_trap.f
2490 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2491 int UNUSED written = 0;
2492 IADDR UNUSED pc = abuf->addr;
2493 SEM_BRANCH_INIT
2494 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2495
2496 {
2497 {
2498 USI opval = GET_H_CR (((UINT) 6));
2499 SET_H_CR (((UINT) 14), opval);
2500 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2501 }
2502 {
2503 USI opval = ADDSI (pc, 4);
2504 SET_H_CR (((UINT) 6), opval);
2505 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2506 }
2507 {
2508 UQI opval = CPU (h_bpsw);
2509 CPU (h_bbpsw) = opval;
2510 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2511 }
2512 {
2513 UQI opval = GET_H_PSW ();
2514 CPU (h_bpsw) = opval;
2515 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2516 }
2517 {
2518 UQI opval = ANDQI (GET_H_PSW (), 128);
2519 SET_H_PSW (opval);
2520 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2521 }
2522 {
2523 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2524 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2525 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2526 }
2527 }
2528
2529 SEM_BRANCH_FINI (vpc);
2530 return vpc;
2531 #undef FLD
2532 }
2533
2534 /* unlock: unlock $src1,@$src2 */
2535
2536 static SEM_PC
SEM_FN_NAME(m32rbf,unlock)2537 SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2538 {
2539 #define FLD(f) abuf->fields.sfmt_st_plus.f
2540 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2541 int UNUSED written = 0;
2542 IADDR UNUSED pc = abuf->addr;
2543 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2544
2545 {
2546 if (CPU (h_lock)) {
2547 {
2548 SI opval = * FLD (i_src1);
2549 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2550 written |= (1 << 4);
2551 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2552 }
2553 }
2554 {
2555 BI opval = 0;
2556 CPU (h_lock) = opval;
2557 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2558 }
2559 }
2560
2561 abuf->written = written;
2562 return vpc;
2563 #undef FLD
2564 }
2565
2566 /* clrpsw: clrpsw $uimm8 */
2567
2568 static SEM_PC
SEM_FN_NAME(m32rbf,clrpsw)2569 SEM_FN_NAME (m32rbf,clrpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2570 {
2571 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2572 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2573 int UNUSED written = 0;
2574 IADDR UNUSED pc = abuf->addr;
2575 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2576
2577 {
2578 SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280));
2579 SET_H_CR (((UINT) 0), opval);
2580 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2581 }
2582
2583 return vpc;
2584 #undef FLD
2585 }
2586
2587 /* setpsw: setpsw $uimm8 */
2588
2589 static SEM_PC
SEM_FN_NAME(m32rbf,setpsw)2590 SEM_FN_NAME (m32rbf,setpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2591 {
2592 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2593 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2594 int UNUSED written = 0;
2595 IADDR UNUSED pc = abuf->addr;
2596 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2597
2598 {
2599 SI opval = FLD (f_uimm8);
2600 SET_H_CR (((UINT) 0), opval);
2601 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2602 }
2603
2604 return vpc;
2605 #undef FLD
2606 }
2607
2608 /* bset: bset $uimm3,@($slo16,$sr) */
2609
2610 static SEM_PC
SEM_FN_NAME(m32rbf,bset)2611 SEM_FN_NAME (m32rbf,bset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2612 {
2613 #define FLD(f) abuf->fields.sfmt_bset.f
2614 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2615 int UNUSED written = 0;
2616 IADDR UNUSED pc = abuf->addr;
2617 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2618
2619 {
2620 QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3))));
2621 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
2622 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2623 }
2624
2625 return vpc;
2626 #undef FLD
2627 }
2628
2629 /* bclr: bclr $uimm3,@($slo16,$sr) */
2630
2631 static SEM_PC
SEM_FN_NAME(m32rbf,bclr)2632 SEM_FN_NAME (m32rbf,bclr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2633 {
2634 #define FLD(f) abuf->fields.sfmt_bset.f
2635 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2636 int UNUSED written = 0;
2637 IADDR UNUSED pc = abuf->addr;
2638 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2639
2640 {
2641 QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3)))));
2642 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
2643 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2644 }
2645
2646 return vpc;
2647 #undef FLD
2648 }
2649
2650 /* btst: btst $uimm3,$sr */
2651
2652 static SEM_PC
SEM_FN_NAME(m32rbf,btst)2653 SEM_FN_NAME (m32rbf,btst) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2654 {
2655 #define FLD(f) abuf->fields.sfmt_bset.f
2656 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2657 int UNUSED written = 0;
2658 IADDR UNUSED pc = abuf->addr;
2659 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2660
2661 {
2662 BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
2663 CPU (h_cond) = opval;
2664 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2665 }
2666
2667 return vpc;
2668 #undef FLD
2669 }
2670
2671 /* Table of all semantic fns. */
2672
2673 static const struct sem_fn_desc sem_fns[] = {
2674 { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) },
2675 { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) },
2676 { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) },
2677 { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) },
2678 { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) },
2679 { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) },
2680 { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) },
2681 { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) },
2682 { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) },
2683 { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) },
2684 { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) },
2685 { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) },
2686 { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) },
2687 { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) },
2688 { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) },
2689 { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) },
2690 { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) },
2691 { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) },
2692 { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) },
2693 { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) },
2694 { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) },
2695 { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) },
2696 { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) },
2697 { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) },
2698 { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) },
2699 { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) },
2700 { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) },
2701 { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) },
2702 { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) },
2703 { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) },
2704 { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) },
2705 { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) },
2706 { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) },
2707 { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) },
2708 { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) },
2709 { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) },
2710 { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) },
2711 { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) },
2712 { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) },
2713 { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) },
2714 { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) },
2715 { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) },
2716 { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) },
2717 { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) },
2718 { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) },
2719 { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) },
2720 { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) },
2721 { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) },
2722 { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) },
2723 { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) },
2724 { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) },
2725 { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) },
2726 { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) },
2727 { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) },
2728 { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) },
2729 { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) },
2730 { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) },
2731 { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) },
2732 { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) },
2733 { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) },
2734 { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) },
2735 { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) },
2736 { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) },
2737 { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) },
2738 { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) },
2739 { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) },
2740 { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) },
2741 { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) },
2742 { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) },
2743 { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) },
2744 { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) },
2745 { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) },
2746 { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) },
2747 { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) },
2748 { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) },
2749 { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) },
2750 { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) },
2751 { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) },
2752 { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) },
2753 { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) },
2754 { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) },
2755 { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) },
2756 { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) },
2757 { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) },
2758 { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) },
2759 { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) },
2760 { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) },
2761 { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) },
2762 { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) },
2763 { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) },
2764 { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) },
2765 { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) },
2766 { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) },
2767 { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) },
2768 { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) },
2769 { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) },
2770 { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) },
2771 { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) },
2772 { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) },
2773 { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) },
2774 { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) },
2775 { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) },
2776 { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) },
2777 { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) },
2778 { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) },
2779 { M32RBF_INSN_CLRPSW, SEM_FN_NAME (m32rbf,clrpsw) },
2780 { M32RBF_INSN_SETPSW, SEM_FN_NAME (m32rbf,setpsw) },
2781 { M32RBF_INSN_BSET, SEM_FN_NAME (m32rbf,bset) },
2782 { M32RBF_INSN_BCLR, SEM_FN_NAME (m32rbf,bclr) },
2783 { M32RBF_INSN_BTST, SEM_FN_NAME (m32rbf,btst) },
2784 { 0, 0 }
2785 };
2786
2787 /* Add the semantic fns to IDESC_TABLE. */
2788
2789 void
SEM_FN_NAME(m32rbf,init_idesc_table)2790 SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu)
2791 {
2792 IDESC *idesc_table = CPU_IDESC (current_cpu);
2793 const struct sem_fn_desc *sf;
2794 int mach_num = MACH_NUM (CPU_MACH (current_cpu));
2795
2796 for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
2797 {
2798 const CGEN_INSN *insn = idesc_table[sf->index].idata;
2799 int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
2800 || CGEN_INSN_MACH_HAS_P (insn, mach_num));
2801 #if FAST_P
2802 if (valid_p)
2803 idesc_table[sf->index].sem_fast = sf->fn;
2804 else
2805 idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid);
2806 #else
2807 if (valid_p)
2808 idesc_table[sf->index].sem_full = sf->fn;
2809 else
2810 idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid);
2811 #endif
2812 }
2813 }
2814
2815