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Searched refs:imx_ccm (Results 1 – 25 of 261) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c31 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
36 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
44 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
54 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
64 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
72 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
101 addr = &imx_ccm->CCGR0; in enable_enet_clk()
104 addr = &imx_ccm->CCGR3; in enable_enet_clk()
107 addr = &imx_ccm->CCGR1; in enable_enet_clk()
177 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c31 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
36 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
44 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
54 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
64 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
72 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
101 addr = &imx_ccm->CCGR0; in enable_enet_clk()
104 addr = &imx_ccm->CCGR3; in enable_enet_clk()
107 addr = &imx_ccm->CCGR1; in enable_enet_clk()
177 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c31 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
36 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
44 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
54 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
64 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
72 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
101 addr = &imx_ccm->CCGR0; in enable_enet_clk()
104 addr = &imx_ccm->CCGR3; in enable_enet_clk()
107 addr = &imx_ccm->CCGR1; in enable_enet_clk()
177 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c31 reg = __raw_readl(&imx_ccm->CCGR2);
36 __raw_writel(reg, &imx_ccm->CCGR2);
44 clrbits_le32(&imx_ccm->CCGR4,
54 clrsetbits_le32(&imx_ccm->cs2cdr,
64 clrsetbits_le32(&imx_ccm->cs2cdr,
72 setbits_le32(&imx_ccm->CCGR4,
101 addr = &imx_ccm->CCGR0;
104 addr = &imx_ccm->CCGR3;
107 addr = &imx_ccm->CCGR1;
177 addr = &imx_ccm->CCGR6;
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/mx6/
H A Dclock.c33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
46 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
56 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
66 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
74 setbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
103 addr = &imx_ccm->CCGR0; in enable_enet_clk()
106 addr = &imx_ccm->CCGR3; in enable_enet_clk()
109 addr = &imx_ccm->CCGR1; in enable_enet_clk()
179 addr = &imx_ccm->CCGR6; in enable_i2c_clk()
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