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Searched refs:ira_class_hard_regs_num (Results 1 – 25 of 394) sorted by relevance

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/dports/lang/gcc48/gcc-4.8.5/gcc/
H A Dlra-assigns.c171 && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] in init_regno_assign_info()
172 == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) in init_regno_assign_info()
199 if ((diff = (ira_class_hard_regs_num[cl1] in reload_pseudo_compare_func()
200 - ira_class_hard_regs_num[cl2])) != 0) in reload_pseudo_compare_func()
575 rclass_size = ira_class_hard_regs_num[rclass]; in find_hard_regno_for()
840 rclass_size = ira_class_hard_regs_num[rclass]; in spill_for()
H A Dira.h143 #define ira_class_hard_regs_num \ macro
H A Dira-int.h1353 len = ira_class_hard_regs_num[(int) aclass]; in ira_allocate_and_set_costs()
1368 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_copy_costs()
1381 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_accumulate_costs()
1404 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_set_or_copy_costs()
H A Dira.c491 ira_class_hard_regs_num[cl] = n; in setup_class_hard_regs()
790 if (ira_class_hard_regs_num[cl] == 0) in setup_pressure_classes()
792 if (ira_class_hard_regs_num[cl] != 1 in setup_pressure_classes()
922 if (ira_class_hard_regs_num[cl] == 0) in setup_uniform_class_p()
931 if (ira_class_hard_regs_num[cl2] == 0) in setup_uniform_class_p()
1016 if (ira_class_hard_regs_num[cl] > 0) in setup_allocno_and_important_classes()
1022 if (ira_class_hard_regs_num[cl] > 0) in setup_allocno_and_important_classes()
1617 if (ira_class_hard_regs_num[*p2] > 0 in ira_init_register_move_cost()
1619 <= ira_class_hard_regs_num[*p2])) in ira_init_register_move_cost()
1624 if (ira_class_hard_regs_num[*p1] > 0 in ira_init_register_move_cost()
[all …]
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/
H A Dlra-assigns.c166 && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] in init_regno_assign_info()
167 == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) in init_regno_assign_info()
194 if ((diff = (ira_class_hard_regs_num[cl1] in reload_pseudo_compare_func()
195 - ira_class_hard_regs_num[cl2])) != 0) in reload_pseudo_compare_func()
561 rclass_size = ira_class_hard_regs_num[rclass]; in find_hard_regno_for()
826 rclass_size = ira_class_hard_regs_num[rclass]; in spill_for()
H A Dira.h143 #define ira_class_hard_regs_num \ macro
H A Dira-int.h1353 len = ira_class_hard_regs_num[(int) aclass]; in ira_allocate_and_set_costs()
1368 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_copy_costs()
1381 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_accumulate_costs()
1404 len = ira_class_hard_regs_num[aclass]; in ira_allocate_and_set_or_copy_costs()
H A Dira.c491 ira_class_hard_regs_num[cl] = n; in setup_class_hard_regs()
790 if (ira_class_hard_regs_num[cl] == 0) in setup_pressure_classes()
792 if (ira_class_hard_regs_num[cl] != 1 in setup_pressure_classes()
922 if (ira_class_hard_regs_num[cl] == 0) in setup_uniform_class_p()
931 if (ira_class_hard_regs_num[cl2] == 0) in setup_uniform_class_p()
1016 if (ira_class_hard_regs_num[cl] > 0) in setup_allocno_and_important_classes()
1022 if (ira_class_hard_regs_num[cl] > 0) in setup_allocno_and_important_classes()
1617 if (ira_class_hard_regs_num[*p2] > 0 in ira_init_register_move_cost()
1619 <= ira_class_hard_regs_num[*p2])) in ira_init_register_move_cost()
1624 if (ira_class_hard_regs_num[*p1] > 0 in ira_init_register_move_cost()
[all …]
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/
H A Dira.h143 #define ira_class_hard_regs_num \ macro
H A Dlra-assigns.c181 && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] in init_regno_assign_info()
182 == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) in init_regno_assign_info()
209 if ((diff = (ira_class_hard_regs_num[cl1] in reload_pseudo_compare_func()
210 - ira_class_hard_regs_num[cl2])) != 0) in reload_pseudo_compare_func()
592 rclass_size = ira_class_hard_regs_num[rclass]; in find_hard_regno_for()
870 rclass_size = ira_class_hard_regs_num[rclass]; in spill_for()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gnat_util/gcc-6-20180516/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
H A Dlra-assigns.c178 && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] in init_regno_assign_info()
179 == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) in init_regno_assign_info()
206 if ((diff = (ira_class_hard_regs_num[cl1] in reload_pseudo_compare_func()
207 - ira_class_hard_regs_num[cl2])) != 0) in reload_pseudo_compare_func()
605 rclass_size = ira_class_hard_regs_num[rclass]; in find_hard_regno_for_1()
914 rclass_size = ira_class_hard_regs_num[rclass]; in spill_for()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc8/gcc-8.5.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc9/gcc-9.4.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/devel/avr-gcc/gcc-10.2.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc10/gcc-10.3.0/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/
H A Dira.h153 #define ira_class_hard_regs_num \ macro

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