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Searched refs:is_store_insn (Results 1 – 25 of 138) sorted by relevance

123456

/dports/lang/gcc48/gcc-4.8.5/gcc/config/mn10300/
H A Dmn10300.c2731 is_store_insn (rtx insn) in is_store_insn() function
2763 && is_store_insn (insn)) in mn10300_adjust_sched_cost()
2769 && ! is_store_insn (insn) in mn10300_adjust_sched_cost()
2803 if (! is_load_insn (insn) && ! is_store_insn (insn)) in mn10300_adjust_sched_cost()
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/mn10300/
H A Dmn10300.c2731 is_store_insn (rtx insn) in is_store_insn() function
2763 && is_store_insn (insn)) in mn10300_adjust_sched_cost()
2769 && ! is_store_insn (insn) in mn10300_adjust_sched_cost()
2803 if (! is_load_insn (insn) && ! is_store_insn (insn)) in mn10300_adjust_sched_cost()
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/mn10300/
H A Dmn10300.c2753 is_store_insn (rtx insn) in is_store_insn() function
2785 && is_store_insn (insn)) in mn10300_adjust_sched_cost()
2791 && ! is_store_insn (insn) in mn10300_adjust_sched_cost()
2825 if (! is_load_insn (insn) && ! is_store_insn (insn)) in mn10300_adjust_sched_cost()
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/rs6000/
H A Drs6000.c1147 static bool is_store_insn (rtx, rtx *);
18566 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
18809 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
18866 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
18872 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18977 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
19050 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
19058 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
19099 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
19263 if (is_store_insn (insn, str_mem) in is_fusable_store()
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/rs6000/
H A Drs6000.c1143 static bool is_store_insn (rtx, rtx *);
18189 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
18432 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
18489 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
18495 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18600 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
18673 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
18681 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
18722 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
18886 if (is_store_insn (insn, str_mem) in is_fusable_store()
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/rs6000/
H A Drs6000.c1125 static bool is_store_insn (rtx, rtx *);
17702 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
17934 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
17991 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
17997 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18102 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
18175 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
18183 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
18224 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/rs6000/
H A Drs6000.c1125 static bool is_store_insn (rtx, rtx *);
17706 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
17938 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
17995 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
18001 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18106 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
18179 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
18187 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
18228 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
/dports/lang/gcc11/gcc-11.2.0/gcc/config/rs6000/
H A Drs6000.c1143 static bool is_store_insn (rtx, rtx *);
18555 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
18788 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
18845 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
18851 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18956 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
19029 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
19037 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
19078 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/rs6000/
H A Drs6000.c1143 static bool is_store_insn (rtx, rtx *);
18555 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
18788 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
18845 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
18851 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18956 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
19029 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
19037 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
19078 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
/dports/lang/gcc10/gcc-10.3.0/gcc/config/rs6000/
H A Drs6000.c1125 static bool is_store_insn (rtx, rtx *);
17704 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
17936 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
17993 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
17999 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
18104 if (is_store_insn (last_scheduled_insn, &str_mem)) in power6_sched_reorder2()
18177 if (is_store_insn (ready[pos], &str_mem)) in power6_sched_reorder2()
18185 if (is_store_insn (last_scheduled_insn, &str_mem2) in power6_sched_reorder2()
18226 if (is_store_insn (ready[pos], &str_mem) in power6_sched_reorder2()
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/rs6000/
H A Drs6000.c941 static bool is_store_insn (rtx, rtx *);
23350 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
23578 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
23613 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
23619 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
23750 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
23825 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
23833 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
23878 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc48/gcc-4.8.5/gcc/config/rs6000/
H A Drs6000.c1065 static bool is_store_insn (rtx, rtx *);
27063 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
27293 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
27328 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
27334 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
27465 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
27540 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
27548 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
27593 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/rs6000/
H A Drs6000.c1082 static bool is_store_insn (rtx, rtx *);
26814 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
27044 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
27079 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
27085 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
27216 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
27291 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
27299 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
27344 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31535 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31766 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31823 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31829 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
32111 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32186 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32194 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32239 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc9/gcc-9.4.0/gcc/config/rs6000/
H A Drs6000.c1349 static bool is_store_insn (rtx, rtx *);
31308 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31539 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31596 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31602 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31884 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
31959 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
31967 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32012 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/rs6000/
H A Drs6000.c1327 static bool is_store_insn (rtx, rtx *);
30746 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
30977 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31034 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31040 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31322 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
31397 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
31405 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
31450 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31383 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31614 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31671 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31677 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31959 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32034 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32042 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32087 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31535 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31766 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31823 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31829 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
32111 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32186 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32194 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32239 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31535 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31766 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31823 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31829 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
32111 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32186 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32194 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32239 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31535 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31766 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31823 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31829 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
32111 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32186 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32194 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32239 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/rs6000/
H A Drs6000.c1349 static bool is_store_insn (rtx, rtx *);
31079 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31310 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31367 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31373 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31655 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
31730 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
31738 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
31783 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/rs6000/
H A Drs6000.c1349 static bool is_store_insn (rtx, rtx *);
31308 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31539 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31596 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31602 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31884 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
31959 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
31967 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32012 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc8/gcc-8.5.0/gcc/config/rs6000/
H A Drs6000.c1367 static bool is_store_insn (rtx, rtx *);
31549 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
31780 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31837 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31843 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
32125 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
32200 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
32208 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
32253 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/rs6000/
H A Drs6000.c1327 static bool is_store_insn (rtx, rtx *);
30746 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
30977 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
31034 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
31040 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
31322 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
31397 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
31405 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
31450 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/
H A Dpowerpcspe.c1349 static bool is_store_insn (rtx, rtx *);
33974 || (load_store_pendulum == 2 && is_store_insn (insn, &str_mem)))) in rs6000_adjust_priority()
34205 is_store_insn (rtx insn, rtx *str_mem) in is_store_insn() function
34262 && is_store_insn (insn, &str_mem)) in rs6000_is_costly_dependence()
34268 && is_store_insn (insn, &str_mem) in rs6000_is_costly_dependence()
34550 if (is_store_insn (last_scheduled_insn, &str_mem)) in rs6000_sched_reorder2()
34625 if (is_store_insn (ready[pos], &str_mem)) in rs6000_sched_reorder2()
34633 if (is_store_insn (last_scheduled_insn, &str_mem2) in rs6000_sched_reorder2()
34678 if (is_store_insn (ready[pos], &str_mem) in rs6000_sched_reorder2()

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