Searched refs:m_dmas (Results 1 – 8 of 8) sorted by relevance
/dports/emulators/mess/mame-mame0226/src/devices/cpu/tlcs900/ |
H A D | tmp95c061.cpp | 340 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 355 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 370 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 371 m_dmas[channel].d += 1; in tlcs900_process_hdma() 376 m_dmas[channel].d += 2; in tlcs900_process_hdma() 381 m_dmas[channel].d += 4; in tlcs900_process_hdma() 385 WRMEM( m_dmad[channel].d, RDMEMW( m_dmas[channel].d ) ); in tlcs900_process_hdma() 386 m_dmas[channel].d -= 1; in tlcs900_process_hdma() 391 m_dmas[channel].d -= 2; in tlcs900_process_hdma() 396 m_dmas[channel].d -= 4; in tlcs900_process_hdma() [all …]
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H A D | tlcs900.cpp | 120 memset(m_dmas, 0x00, sizeof(m_dmas)); in device_start() 137 save_item( NAME(m_dmas) ); in device_start() 176 state_add( TLCS900_DMAS0, "DMAS0", m_dmas[0].d ).formatstr("%08X"); in device_start() 180 state_add( TLCS900_DMAS1, "DMAS1", m_dmas[1].d ).formatstr("%08X"); in device_start() 184 state_add( TLCS900_DMAS2, "DMAS2", m_dmas[2].d ).formatstr("%08X"); in device_start() 188 state_add( TLCS900_DMAS3, "DMAS3", m_dmas[3].d ).formatstr("%08X"); in device_start()
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H A D | tlcs900.h | 98 PAIR m_dmas[4]; variable
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H A D | 900tbl.hxx | 3976 m_p1_reg32 = &m_dmas[0].d; in prepare_operands() 3979 m_p1_reg32 = &m_dmas[1].d; in prepare_operands() 3982 m_p1_reg32 = &m_dmas[2].d; in prepare_operands() 3985 m_p1_reg32 = &m_dmas[3].d; in prepare_operands() 4118 m_p2_reg32 = &m_dmas[0].d; in prepare_operands() 4121 m_p2_reg32 = &m_dmas[1].d; in prepare_operands() 4124 m_p2_reg32 = &m_dmas[2].d; in prepare_operands() 4127 m_p2_reg32 = &m_dmas[3].d; in prepare_operands()
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/tlcs900/ |
H A D | tmp95c061.cpp | 340 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 355 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 370 WRMEM( m_dmad[channel].d, RDMEM( m_dmas[channel].d ) ); in tlcs900_process_hdma() 371 m_dmas[channel].d += 1; in tlcs900_process_hdma() 376 m_dmas[channel].d += 2; in tlcs900_process_hdma() 381 m_dmas[channel].d += 4; in tlcs900_process_hdma() 385 WRMEM( m_dmad[channel].d, RDMEMW( m_dmas[channel].d ) ); in tlcs900_process_hdma() 386 m_dmas[channel].d -= 1; in tlcs900_process_hdma() 391 m_dmas[channel].d -= 2; in tlcs900_process_hdma() 396 m_dmas[channel].d -= 4; in tlcs900_process_hdma() [all …]
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H A D | tlcs900.cpp | 120 memset(m_dmas, 0x00, sizeof(m_dmas)); in device_start() 137 save_item( NAME(m_dmas) ); in device_start() 176 state_add( TLCS900_DMAS0, "DMAS0", m_dmas[0].d ).formatstr("%08X"); in device_start() 180 state_add( TLCS900_DMAS1, "DMAS1", m_dmas[1].d ).formatstr("%08X"); in device_start() 184 state_add( TLCS900_DMAS2, "DMAS2", m_dmas[2].d ).formatstr("%08X"); in device_start() 188 state_add( TLCS900_DMAS3, "DMAS3", m_dmas[3].d ).formatstr("%08X"); in device_start()
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H A D | tlcs900.h | 98 PAIR m_dmas[4]; variable
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H A D | 900tbl.hxx | 3976 m_p1_reg32 = &m_dmas[0].d; in prepare_operands() 3979 m_p1_reg32 = &m_dmas[1].d; in prepare_operands() 3982 m_p1_reg32 = &m_dmas[2].d; in prepare_operands() 3985 m_p1_reg32 = &m_dmas[3].d; in prepare_operands() 4118 m_p2_reg32 = &m_dmas[0].d; in prepare_operands() 4121 m_p2_reg32 = &m_dmas[1].d; in prepare_operands() 4124 m_p2_reg32 = &m_dmas[2].d; in prepare_operands() 4127 m_p2_reg32 = &m_dmas[3].d; in prepare_operands()
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