| /dports/devel/llvm80/llvm-8.0.1.src/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1534 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/llvm90/llvm-9.0.1.src/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1598 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/llvm10/llvm-10.0.1.src/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1641 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1641 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1641 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1864 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1860 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/llvm11/llvm-11.0.1.src/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1821 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1877 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp, in RegisterScheduler()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1945 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21880 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
39441 SDValue Src = DAG.matchBinOpReduction( in combineHorizontalMinMaxResult()
39518 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combineHorizontalPredicateResult()
39520 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combineHorizontalPredicateResult()
39665 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
40006 DAG.matchBinOpReduction(ExtElt, Opc, {ISD::ADD, ISD::FADD}, true); in combineReductionToHorizontal()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22375 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
40527 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
40603 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
40605 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40750 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
41114 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21564 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
38676 SDValue Src = DAG.matchBinOpReduction( in combineHorizontalMinMaxResult()
38753 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combineHorizontalPredicateResult()
38755 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combineHorizontalPredicateResult()
38902 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
39241 DAG.matchBinOpReduction(ExtElt, Opc, {ISD::ADD, ISD::FADD}, true); in combineReductionToHorizontal()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22375 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
40527 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
40603 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
40605 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40750 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
41114 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22157 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
39906 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
39982 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
39984 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40129 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
40469 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21564 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
38701 SDValue Src = DAG.matchBinOpReduction( in combineHorizontalMinMaxResult()
38778 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combineHorizontalPredicateResult()
38780 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combineHorizontalPredicateResult()
38927 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
39266 DAG.matchBinOpReduction(ExtElt, Opc, {ISD::ADD, ISD::FADD}, true); in combineReductionToHorizontal()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22369 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
40521 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
40597 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
40599 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40744 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
41108 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22375 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
40527 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
40603 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
40605 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40750 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
41114 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22157 DAG.matchBinOpReduction(Op.getNode(), BinOp, {ISD::OR})) { in MatchVectorAllZeroTest()
39906 SDValue Src = DAG.matchBinOpReduction( in combineMinMaxReduction()
39982 SDValue Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::OR, ISD::AND}); in combinePredicateReduction()
39984 Match = DAG.matchBinOpReduction(Extract, BinOp, {ISD::XOR}); in combinePredicateReduction()
40129 SDValue Root = DAG.matchBinOpReduction(Extract, BinOp, {ISD::ADD}); in combineBasicSADPattern()
40469 SDValue Rdx = DAG.matchBinOpReduction(ExtElt, Opc, in combineArithReduction()
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