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/dports/astro/xtide/libtcd-2.2.7/
H A Dbit_pack.c11 0xfe}, notmask[8] = {0xff, 0x7f, 0x3f, 0x1f, 0x0f, variable
133 buffer[start_byte] &= mask[start_bit] | notmask[end_bit]; in bit_pack()
141 (notmask[start_bit] & mask[end_bit]); in bit_pack()
161 notmask[start_bit]; in bit_pack()
183 buffer[start_byte] &= notmask[end_bit]; in bit_pack()
260 value = (NV_U_INT32) buffer[start_byte] & (notmask[start_bit] & in bit_unpack()
277 value = (NV_U_INT32) (buffer[start_byte++] & notmask[start_bit]) << in bit_unpack()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
70 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
97 %mx = and <4 x i32> %notmask, %x
113 %n1 = and <4 x i32> %n0, %notmask
125 %my = and <4 x i32> %notmask, %y
164 %n1 = and <4 x i32> %n0, %notmask
178 %my = and <4 x i32> %notmask, %y
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
70 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
97 %mx = and <4 x i32> %notmask, %x
113 %n1 = and <4 x i32> %n0, %notmask
125 %my = and <4 x i32> %notmask, %y
164 %n1 = and <4 x i32> %n0, %notmask
178 %my = and <4 x i32> %notmask, %y
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
H A Dunfold-masked-merge-vector-variablemask.ll20 %my = and <1 x i8> %y, %notmask
40 %my = and <2 x i8> %y, %notmask
52 %my = and <1 x i16> %y, %notmask
72 %my = and <4 x i8> %y, %notmask
88 %my = and <4 x i8> %y, %notmask
104 %my = and <2 x i16> %y, %notmask
116 %my = and <1 x i32> %y, %notmask
132 %my = and <8 x i8> %y, %notmask
144 %my = and <4 x i16> %y, %notmask
156 %my = and <4 x i16> %y, %notmask
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
70 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
97 %mx = and <4 x i32> %notmask, %x
113 %n1 = and <4 x i32> %n0, %notmask
125 %my = and <4 x i32> %notmask, %y
164 %n1 = and <4 x i32> %n0, %notmask
178 %my = and <4 x i32> %notmask, %y
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
41 %mx = and <4 x i32> %notmask, %x
57 %n1 = and <4 x i32> %n0, %notmask
71 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
98 %mx = and <4 x i32> %notmask, %x
114 %n1 = and <4 x i32> %n0, %notmask
127 %my = and <4 x i32> %notmask, %y
167 %n1 = and <4 x i32> %n0, %notmask
181 %my = and <4 x i32> %notmask, %y
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
40 %mx = and <4 x i32> %notmask, %x
56 %n1 = and <4 x i32> %n0, %notmask
69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
94 %mx = and <4 x i32> %notmask, %x
109 %n1 = and <4 x i32> %n0, %notmask
121 %my = and <4 x i32> %notmask, %y
160 %n1 = and <4 x i32> %n0, %notmask
173 %my = and <4 x i32> %notmask, %y
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Dunfold-masked-merge-vector-variablemask-const.ll14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
41 %mx = and <4 x i32> %notmask, %x
57 %n1 = and <4 x i32> %n0, %notmask
71 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
98 %mx = and <4 x i32> %notmask, %x
114 %n1 = and <4 x i32> %n0, %notmask
127 %my = and <4 x i32> %notmask, %y
167 %n1 = and <4 x i32> %n0, %notmask
181 %my = and <4 x i32> %notmask, %y
[all …]

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