1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s 3 4; ============================================================================ ; 5; Various cases with %x and/or %y being a constant 6; ============================================================================ ; 7 8define <4 x i32> @out_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 9; CHECK-LABEL: out_constant_varx_mone: 10; CHECK: // %bb.0: 11; CHECK-NEXT: and v0.16b, v2.16b, v0.16b 12; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b 13; CHECK-NEXT: ret 14 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 15 %mx = and <4 x i32> %mask, %x 16 %my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1> 17 %r = or <4 x i32> %mx, %my 18 ret <4 x i32> %r 19} 20 21define <4 x i32> @in_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 22; CHECK-LABEL: in_constant_varx_mone: 23; CHECK: // %bb.0: 24; CHECK-NEXT: bic v0.16b, v2.16b, v0.16b 25; CHECK-NEXT: mvn v0.16b, v0.16b 26; CHECK-NEXT: ret 27 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x 28 %n1 = and <4 x i32> %n0, %mask 29 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1> 30 ret <4 x i32> %r 31} 32 33; This is not a canonical form. Testing for completeness only. 34define <4 x i32> @out_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 35; CHECK-LABEL: out_constant_varx_mone_invmask: 36; CHECK: // %bb.0: 37; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b 38; CHECK-NEXT: ret 39 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 40 %mx = and <4 x i32> %notmask, %x 41 %my = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 42 %r = or <4 x i32> %mx, %my 43 ret <4 x i32> %r 44} 45 46; This is not a canonical form. Testing for completeness only. 47define <4 x i32> @in_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 48; CHECK-LABEL: in_constant_varx_mone_invmask: 49; CHECK: // %bb.0: 50; CHECK-NEXT: mvn v0.16b, v0.16b 51; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b 52; CHECK-NEXT: mvn v0.16b, v0.16b 53; CHECK-NEXT: ret 54 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 55 %n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x 56 %n1 = and <4 x i32> %n0, %notmask 57 %r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1> 58 ret <4 x i32> %r 59} 60 61define <4 x i32> @out_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 62; CHECK-LABEL: out_constant_varx_42: 63; CHECK: // %bb.0: 64; CHECK-NEXT: movi v1.4s, #42 65; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 66; CHECK-NEXT: ret 67 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 68 %mx = and <4 x i32> %mask, %x 69 %my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42> 70 %r = or <4 x i32> %mx, %my 71 ret <4 x i32> %r 72} 73 74define <4 x i32> @in_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 75; CHECK-LABEL: in_constant_varx_42: 76; CHECK: // %bb.0: 77; CHECK-NEXT: movi v1.4s, #42 78; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 79; CHECK-NEXT: ret 80 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x 81 %n1 = and <4 x i32> %n0, %mask 82 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42> 83 ret <4 x i32> %r 84} 85 86; This is not a canonical form. Testing for completeness only. 87define <4 x i32> @out_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 88; CHECK-LABEL: out_constant_varx_42_invmask: 89; CHECK: // %bb.0: 90; CHECK-NEXT: movi v1.4s, #42 91; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 92; CHECK-NEXT: ret 93 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 94 %mx = and <4 x i32> %notmask, %x 95 %my = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42> 96 %r = or <4 x i32> %mx, %my 97 ret <4 x i32> %r 98} 99 100; This is not a canonical form. Testing for completeness only. 101define <4 x i32> @in_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 102; CHECK-LABEL: in_constant_varx_42_invmask: 103; CHECK: // %bb.0: 104; CHECK-NEXT: movi v1.4s, #42 105; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 106; CHECK-NEXT: ret 107 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 108 %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x 109 %n1 = and <4 x i32> %n0, %notmask 110 %r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42> 111 ret <4 x i32> %r 112} 113 114define <4 x i32> @out_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 115; CHECK-LABEL: out_constant_mone_vary: 116; CHECK: // %bb.0: 117; CHECK-NEXT: orr v0.16b, v1.16b, v2.16b 118; CHECK-NEXT: ret 119 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 120 %mx = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 121 %my = and <4 x i32> %notmask, %y 122 %r = or <4 x i32> %mx, %my 123 ret <4 x i32> %r 124} 125 126define <4 x i32> @in_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 127; CHECK-LABEL: in_constant_mone_vary: 128; CHECK: // %bb.0: 129; CHECK-NEXT: orr v0.16b, v1.16b, v2.16b 130; CHECK-NEXT: ret 131 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x 132 %n1 = and <4 x i32> %n0, %mask 133 %r = xor <4 x i32> %n1, %y 134 ret <4 x i32> %r 135} 136 137; This is not a canonical form. Testing for completeness only. 138define <4 x i32> @out_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 139; CHECK-LABEL: out_constant_mone_vary_invmask: 140; CHECK: // %bb.0: 141; CHECK-NEXT: and v0.16b, v2.16b, v1.16b 142; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b 143; CHECK-NEXT: ret 144 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 145 %mx = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1> 146 %my = and <4 x i32> %mask, %y 147 %r = or <4 x i32> %mx, %my 148 ret <4 x i32> %r 149} 150 151; This is not a canonical form. Testing for completeness only. 152define <4 x i32> @in_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 153; CHECK-LABEL: in_constant_mone_vary_invmask: 154; CHECK: // %bb.0: 155; CHECK-NEXT: and v0.16b, v1.16b, v2.16b 156; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b 157; CHECK-NEXT: ret 158 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 159 %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x 160 %n1 = and <4 x i32> %n0, %notmask 161 %r = xor <4 x i32> %n1, %y 162 ret <4 x i32> %r 163} 164 165define <4 x i32> @out_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 166; CHECK-LABEL: out_constant_42_vary: 167; CHECK: // %bb.0: 168; CHECK-NEXT: movi v0.4s, #42 169; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 170; CHECK-NEXT: ret 171 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 172 %mx = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42> 173 %my = and <4 x i32> %notmask, %y 174 %r = or <4 x i32> %mx, %my 175 ret <4 x i32> %r 176} 177 178define <4 x i32> @in_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 179; CHECK-LABEL: in_constant_42_vary: 180; CHECK: // %bb.0: 181; CHECK-NEXT: movi v0.4s, #42 182; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 183; CHECK-NEXT: ret 184 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x 185 %n1 = and <4 x i32> %n0, %mask 186 %r = xor <4 x i32> %n1, %y 187 ret <4 x i32> %r 188} 189 190; This is not a canonical form. Testing for completeness only. 191define <4 x i32> @out_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 192; CHECK-LABEL: out_constant_42_vary_invmask: 193; CHECK: // %bb.0: 194; CHECK-NEXT: movi v0.4s, #42 195; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 196; CHECK-NEXT: ret 197 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 198 %mx = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42> 199 %my = and <4 x i32> %mask, %y 200 %r = or <4 x i32> %mx, %my 201 ret <4 x i32> %r 202} 203 204; This is not a canonical form. Testing for completeness only. 205define <4 x i32> @in_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { 206; CHECK-LABEL: in_constant_42_vary_invmask: 207; CHECK: // %bb.0: 208; CHECK-NEXT: movi v0.4s, #42 209; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b 210; CHECK-NEXT: ret 211 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> 212 %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x 213 %n1 = and <4 x i32> %n0, %notmask 214 %r = xor <4 x i32> %n1, %y 215 ret <4 x i32> %r 216} 217