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Searched refs:pmsav7 (Results 1 – 25 of 45) sorted by relevance

12

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dmachine.c335 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
344 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
346 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
348 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
373 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
407 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
445 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c313 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
314 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
315 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
316 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
317 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
318 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
321 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
322 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
991 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
992 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dmachine.c385 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
394 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
396 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
398 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
423 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
457 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
495 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c391 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
392 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
393 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
394 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
395 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
396 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
399 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
400 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1797 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1798 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dmachine.c385 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
394 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
396 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
398 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
423 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
457 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
495 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c371 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
372 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
373 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
374 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
375 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
376 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
379 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
380 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1766 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1767 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dmachine.c385 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
394 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
396 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
398 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
423 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
457 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
495 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c360 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
361 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
362 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
363 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
364 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
365 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
368 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
369 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1742 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1743 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dmachine.c384 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
393 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
395 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
397 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
422 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
456 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
494 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c365 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
366 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
367 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
368 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
369 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
370 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
373 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
374 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1610 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1611 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dmachine.c384 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
393 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
395 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
397 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
422 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
456 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
494 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dmachine.c385 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
394 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
396 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
398 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
423 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
457 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
495 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Darmv7m_nvic.c1088 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1094 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1122 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1143 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1493 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1511 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1534 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1536 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1543 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1552 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dmachine.c405 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
414 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
416 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
418 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
443 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
477 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
515 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c410 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
411 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
412 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
413 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
414 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
415 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
418 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
419 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1868 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1869 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dmachine.c405 return cpu->env.pmsav7.rnr[M_REG_NS] < cpu->pmsav7_dregion; in pmsav7_rgnr_vmstate_validate()
414 VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
416 VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
418 VMSTATE_VARRAY_UINT32(env.pmsav7.dracr, ARMCPU, pmsav7_dregion, 0,
443 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
477 return cpu->env.pmsav7.rnr[M_REG_S] < cpu->pmsav7_dregion; in s_rnr_vmstate_validate()
515 VMSTATE_UINT32(env.pmsav7.rnr[M_REG_S], ARMCPU),
H A Dcpu.c410 memset(env->pmsav7.drbar, 0, in arm_cpu_reset()
411 sizeof(*env->pmsav7.drbar) * cpu->pmsav7_dregion); in arm_cpu_reset()
412 memset(env->pmsav7.drsr, 0, in arm_cpu_reset()
413 sizeof(*env->pmsav7.drsr) * cpu->pmsav7_dregion); in arm_cpu_reset()
414 memset(env->pmsav7.dracr, 0, in arm_cpu_reset()
415 sizeof(*env->pmsav7.dracr) * cpu->pmsav7_dregion); in arm_cpu_reset()
418 env->pmsav7.rnr[M_REG_NS] = 0; in arm_cpu_reset()
419 env->pmsav7.rnr[M_REG_S] = 0; in arm_cpu_reset()
1868 env->pmsav7.drbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
1869 env->pmsav7.drsr = g_new0(uint32_t, nr); in arm_cpu_realizefn()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Darmv7m_nvic.c1282 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1288 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1316 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1337 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1746 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1764 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1787 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1789 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1796 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1805 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Darmv7m_nvic.c1370 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1376 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1404 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1425 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1859 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1877 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1900 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1902 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1909 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1918 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Darmv7m_nvic.c1338 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1344 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1372 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1393 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1802 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1820 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1843 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1845 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1852 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1861 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Darmv7m_nvic.c1282 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1288 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1316 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1337 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1746 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1764 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1787 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1789 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1796 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1805 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Darmv7m_nvic.c1282 return cpu->env.pmsav7.rnr[attrs.secure];
1288 int region = cpu->env.pmsav7.rnr[attrs.secure];
1316 int region = cpu->env.pmsav7.rnr[attrs.secure];
1337 (cpu->env.pmsav7.drsr[region] & 0xffff);
1746 cpu->env.pmsav7.rnr[attrs.secure] = value;
1764 region = cpu->env.pmsav7.rnr[attrs.secure];
1787 cpu->env.pmsav7.rnr[attrs.secure] = region;
1789 region = cpu->env.pmsav7.rnr[attrs.secure];
1796 cpu->env.pmsav7.drbar[region] = value & ~0x1f;
1805 int region = cpu->env.pmsav7.rnr[attrs.secure];
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Darmv7m_nvic.c1282 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1288 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1316 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1337 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1746 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1764 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1787 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1789 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1796 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1805 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Darmv7m_nvic.c1370 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1376 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1404 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1425 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1859 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1877 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1900 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1902 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1909 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1918 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Darmv7m_nvic.c1355 return cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1361 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1389 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_readl()
1410 (cpu->env.pmsav7.drsr[region] & 0xffff); in nvic_readl()
1844 cpu->env.pmsav7.rnr[attrs.secure] = value; in nvic_writel()
1862 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1885 cpu->env.pmsav7.rnr[attrs.secure] = region; in nvic_writel()
1887 region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
1894 cpu->env.pmsav7.drbar[region] = value & ~0x1f; in nvic_writel()
1903 int region = cpu->env.pmsav7.rnr[attrs.secure]; in nvic_writel()
[all …]

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