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Searched refs:pmu_base (Results 1 – 25 of 145) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/soc/dove/
H A Dpmu.c33 void __iomem *pmu_base; member
149 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_off() local
157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off()
158 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_off()
170 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_off()
183 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_on() local
190 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_on()
203 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_on()
321 pmu->pmu_base = initdata->pmu_base; in dove_init_pmu_legacy()
398 if (!pmu->pmc_base || !pmu->pmu_base) { in dove_init_pmu()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/soc/dove/
H A Dpmu.c33 void __iomem *pmu_base; member
149 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_off() local
157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off()
158 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_off()
170 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_off()
183 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_on() local
190 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_on()
203 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_on()
321 pmu->pmu_base = initdata->pmu_base; in dove_init_pmu_legacy()
398 if (!pmu->pmc_base || !pmu->pmu_base) { in dove_init_pmu()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/soc/dove/
H A Dpmu.c33 void __iomem *pmu_base; member
149 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_off() local
157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off()
158 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_off()
170 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_off()
183 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_on() local
190 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_on()
203 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_on()
321 pmu->pmu_base = initdata->pmu_base; in dove_init_pmu_legacy()
398 if (!pmu->pmc_base || !pmu->pmu_base) { in dove_init_pmu()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/vr41xx/common/
H A Dpmu.c32 static void __iomem *pmu_base; variable
34 #define pmu_read(offset) readw(pmu_base + (offset))
35 #define pmu_write(offset, value) writew((value), pmu_base + (offset))
109 pmu_base = ioremap(start, size); in vr41xx_pmu_init()
110 if (pmu_base == NULL) { in vr41xx_pmu_init()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/vr41xx/common/
H A Dpmu.c32 static void __iomem *pmu_base; variable
34 #define pmu_read(offset) readw(pmu_base + (offset))
35 #define pmu_write(offset, value) writew((value), pmu_base + (offset))
109 pmu_base = ioremap(start, size); in vr41xx_pmu_init()
110 if (pmu_base == NULL) { in vr41xx_pmu_init()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/vr41xx/common/
H A Dpmu.c32 static void __iomem *pmu_base; variable
34 #define pmu_read(offset) readw(pmu_base + (offset))
35 #define pmu_write(offset, value) writew((value), pmu_base + (offset))
109 pmu_base = ioremap(start, size); in vr41xx_pmu_init()
110 if (pmu_base == NULL) { in vr41xx_pmu_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-rockchip/
H A Dplatsmp.c211 void __iomem *pmu_base; in rockchip_smp_prepare_pmu() local
238 pmu_base = of_iomap(node, 0); in rockchip_smp_prepare_pmu()
240 if (!pmu_base) { in rockchip_smp_prepare_pmu()
245 pmu = regmap_init_mmio(NULL, pmu_base, &rockchip_pmu_regmap_config); in rockchip_smp_prepare_pmu()
249 iounmap(pmu_base); in rockchip_smp_prepare_pmu()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-rockchip/
H A Dplatsmp.c211 void __iomem *pmu_base; in rockchip_smp_prepare_pmu() local
238 pmu_base = of_iomap(node, 0); in rockchip_smp_prepare_pmu()
240 if (!pmu_base) { in rockchip_smp_prepare_pmu()
245 pmu = regmap_init_mmio(NULL, pmu_base, &rockchip_pmu_regmap_config); in rockchip_smp_prepare_pmu()
249 iounmap(pmu_base); in rockchip_smp_prepare_pmu()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-rockchip/
H A Dplatsmp.c211 void __iomem *pmu_base; in rockchip_smp_prepare_pmu() local
238 pmu_base = of_iomap(node, 0); in rockchip_smp_prepare_pmu()
240 if (!pmu_base) { in rockchip_smp_prepare_pmu()
245 pmu = regmap_init_mmio(NULL, pmu_base, &rockchip_pmu_regmap_config); in rockchip_smp_prepare_pmu()
249 iounmap(pmu_base); in rockchip_smp_prepare_pmu()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/perf/
H A Darm-cmn.c188 void __iomem *pmu_base; member
690 u64 reg = readq_relaxed(xp->pmu_base + offset); in arm_cmn_read_dtm()
777 writeq_relaxed(val, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
778 writeq_relaxed(mask, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
803 writeq_relaxed(0, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
1082 dn->pmu_base + CMN_PMU_EVENT_SEL + 4); in arm_cmn_event_add()
1098 writeq_relaxed(reg, xp->pmu_base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
1240 writeq_relaxed(0, xp->pmu_base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
1241 writeq_relaxed(~0ULL, xp->pmu_base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
1252 dtc->base = dn->pmu_base - CMN_PMU_OFFSET; in arm_cmn_init_dtc()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/perf/
H A Darm-cmn.c188 void __iomem *pmu_base; member
690 u64 reg = readq_relaxed(xp->pmu_base + offset); in arm_cmn_read_dtm()
777 writeq_relaxed(val, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
778 writeq_relaxed(mask, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
803 writeq_relaxed(0, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
1082 dn->pmu_base + CMN_PMU_EVENT_SEL + 4); in arm_cmn_event_add()
1098 writeq_relaxed(reg, xp->pmu_base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
1240 writeq_relaxed(0, xp->pmu_base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
1241 writeq_relaxed(~0ULL, xp->pmu_base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
1252 dtc->base = dn->pmu_base - CMN_PMU_OFFSET; in arm_cmn_init_dtc()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/perf/
H A Darm-cmn.c188 void __iomem *pmu_base; member
690 u64 reg = readq_relaxed(xp->pmu_base + offset); in arm_cmn_read_dtm()
777 writeq_relaxed(val, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
778 writeq_relaxed(mask, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
803 writeq_relaxed(0, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
1082 dn->pmu_base + CMN_PMU_EVENT_SEL + 4); in arm_cmn_event_add()
1098 writeq_relaxed(reg, xp->pmu_base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
1240 writeq_relaxed(0, xp->pmu_base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
1241 writeq_relaxed(~0ULL, xp->pmu_base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
1252 dtc->base = dn->pmu_base - CMN_PMU_OFFSET; in arm_cmn_init_dtc()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/pinctrl/mvebu/
H A Dpinctrl-dove.c60 static void __iomem *pmu_base; variable
74 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_get()
95 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
98 writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
825 pmu_base = devm_ioremap_resource(&pdev->dev, res); in dove_pinctrl_probe()
826 if (IS_ERR(pmu_base)) in dove_pinctrl_probe()
827 return PTR_ERR(pmu_base); in dove_pinctrl_probe()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pinctrl/mvebu/
H A Dpinctrl-dove.c60 static void __iomem *pmu_base; variable
74 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_get()
95 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
98 writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
825 pmu_base = devm_ioremap_resource(&pdev->dev, res); in dove_pinctrl_probe()
826 if (IS_ERR(pmu_base)) in dove_pinctrl_probe()
827 return PTR_ERR(pmu_base); in dove_pinctrl_probe()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pinctrl/mvebu/
H A Dpinctrl-dove.c60 static void __iomem *pmu_base; variable
74 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_get()
95 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
98 writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
825 pmu_base = devm_ioremap_resource(&pdev->dev, res); in dove_pinctrl_probe()
826 if (IS_ERR(pmu_base)) in dove_pinctrl_probe()
827 return PTR_ERR(pmu_base); in dove_pinctrl_probe()
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/soc/dove/
H A Dpmu.h16 void __iomem *pmu_base; member
/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/soc/dove/
H A Dpmu.h16 void __iomem *pmu_base; member
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/soc/dove/
H A Dpmu.h16 void __iomem *pmu_base; member
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv8/zynqmp/
H A Dhandoff.c84 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in handoff_setup()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/cpu/armv8/zynqmp/
H A Dhandoff.c84 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in handoff_setup()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv8/zynqmp/
H A Dhandoff.c84 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in handoff_setup()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/cpu/armv8/zynqmp/
H A Dhandoff.c84 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in handoff_setup()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/cpu/armv8/zynqmp/
H A Dhandoff.c84 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in handoff_setup()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-zynqmp/
H A Dhandoff.c89 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in bl2_plat_get_bl31_params()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-zynqmp/
H A Dhandoff.c89 writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); in bl2_plat_get_bl31_params()

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