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Searched refs:ps_gpio_out (Results 1 – 8 of 8) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/rh/
H A Dn3xx.v696 wire [63:0] ps_gpio_out; net
2640 assign DBA_MODULE_PWR_ENABLE = ps_gpio_out[8];
2641 assign DBA_RF_PWR_ENABLE = ps_gpio_out[9];
3094 .GPIO_0_tri_o(ps_gpio_out),
3337 assign DBA_ADC_SPI_CS_B = ps_gpio_out[13];
3338 assign DBA_DAC_SPI_CS_B = ps_gpio_out[14];
3360 assign DBB_ADC_SPI_CS_B = ps_gpio_out[15];
3506 .ps_gpio_out(ps_gpio_out[FP_GPIO_WIDTH+FP_GPIO_OFFSET-1:FP_GPIO_OFFSET]),
3938 assign PANEL_LED_LINK = ps_gpio_out[45];
3939 assign PANEL_LED_REF = ps_gpio_out[46];
[all …]
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e31x/
H A De31x_idle.v198 wire [63:0] ps_gpio_out; net
233 .GPIO_0_tri_o(ps_gpio_out),
H A De31x.v259 wire [63:0] ps_gpio_out; net
505 .GPIO_0_tri_o(ps_gpio_out),
895 .ps_gpio_out(ps_gpio_out[FP_GPIO_WIDTH+FP_GPIO_OFFSET-1: FP_GPIO_OFFSET]),
H A De31x_core.v70 input wire [FP_GPIO_WIDTH-1:0] ps_gpio_out, port
614 .I1(ps_gpio_out[i]), // LUT input. Input 2
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/mg/
H A Dn3xx.v709 wire [63:0] ps_gpio_out; net
1768 .wr_reset_n (~ps_gpio_out[48]), // reset for WR only
1821 assign ps_gpio_in[60] = ps_gpio_tri[60] ? sfp0_link_up : ps_gpio_out[60];
1946 assign ps_gpio_in[61] = ps_gpio_tri[61] ? sfp1_link_up : ps_gpio_out[61];
3115 .GPIO_0_tri_o(ps_gpio_out),
3372 assign dac_a_cs_n = ps_gpio_out[8]; // DAC select driven through GPIO.
3436 assign dac_b_cs_n = ps_gpio_out[9]; // DAC select driven through GPIO.
3576 .ps_gpio_out(ps_gpio_out[FP_GPIO_WIDTH+FP_GPIO_OFFSET-1:FP_GPIO_OFFSET]),
3999 assign PANEL_LED_LINK = ps_gpio_out[45];
4000 assign PANEL_LED_REF = ps_gpio_out[46];
[all …]
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/
H A De320.v1161 assign ps_gpio_in[60] = ps_gpio_tri[60] ? sfp_link_up : ps_gpio_out[60];
1391 wire [63:0] ps_gpio_out; net
1425 .GPIO_0_tri_o(ps_gpio_out),
1794 .ps_gpio_out(ps_gpio_out[FP_GPIO_WIDTH+FP_GPIO_OFFSET-1: FP_GPIO_OFFSET]),
H A De320_core.v71 input wire [FP_GPIO_WIDTH-1:0] ps_gpio_out, port
970 .I1(ps_gpio_out[i]), // LUT input. Input 2
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/
H A Dn3xx_core.v77 input [FP_GPIO_WIDTH-1:0] ps_gpio_out, port
1058 .I1(ps_gpio_out[i]), // LUT input. Input 2