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Searched refs:pvsubs (Results 1 – 25 of 25) sorted by relevance

/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/VE/
H A DVSBS.s14 # CHECK-INST: pvsubs.lo %vix, 22, %v22
18 # CHECK-INST: pvsubs.lo %vix, 22, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
38 # CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvsub.ll847 ; CHECK-NEXT: pvsubs %v0, %v0, %v1
854 declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32)
862 ; CHECK-NEXT: pvsubs %v2, %v0, %v1
872 declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
880 ; CHECK-NEXT: pvsubs %v0, %s0, %v0
882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256)
887 declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32)
895 ; CHECK-NEXT: pvsubs %v1, %s0, %v0
905 declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32)
913 ; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/VE/
H A DVEInstrVec.td785 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
790 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
792 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
793 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
794 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
795 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
796 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/VE/
H A DVEInstrVec.td842 defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
847 defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
849 defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
850 def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
851 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
852 def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
853 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
/dports/multimedia/xine/xine-ui-0.99.12/src/xitk/
H A Dmediamark.c2559 char *vsubs, *pvsubs; in mediamark_insert_entry() local
2578 pvsubs = vsubs; in mediamark_insert_entry()
2579 while((ext = xine_strsep(&pvsubs, ",")) && !sub) { in mediamark_insert_entry()