| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| H A D | radv_private.h | 2017 radv_image_has_cmask(const struct radv_image *image) in radv_image_has_cmask() function
2065 return radv_image_has_cmask(image) || radv_image_has_fmask(image) || radv_image_has_dcc(image); in radv_image_has_CB_metadata()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| H A D | radv_private.h | 2017 radv_image_has_cmask(const struct radv_image *image) in radv_image_has_cmask() function
2065 return radv_image_has_cmask(image) || radv_image_has_fmask(image) || radv_image_has_dcc(image); in radv_image_has_CB_metadata()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| H A D | radv_private.h | 2017 radv_image_has_cmask(const struct radv_image *image) in radv_image_has_cmask() function
2065 return radv_image_has_cmask(image) || radv_image_has_fmask(image) || radv_image_has_dcc(image); in radv_image_has_CB_metadata()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/vulkan/ |
| H A D | radv_image.c | 1404 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1415 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1514 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1688 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 781 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/libosmesa/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/lang/clover/mesa-21.3.6/src/amd/vulkan/ |
| H A D | radv_image.c | 1330 …if (radv_image_has_cmask(image) || (radv_image_has_dcc(image) && !image->support_comp_to_single)) { in radv_image_alloc_values()
1341 radv_image_has_cmask(image) || radv_image_has_htile(image)) { in radv_image_alloc_values()
1440 if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image)) in radv_image_can_fast_clear()
1603 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image); in radv_image_create_layout()
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| H A D | radv_meta_fast_clear.c | 783 if (radv_image_has_dcc(image) && radv_image_has_cmask(image)) { in radv_fast_clear_flush_image_inplace()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/vulkan/ |
| H A D | radv_image.c | 285 if (!radv_image_has_cmask(image)) in radv_use_tc_compat_cmask_for_image()
1260 if (radv_image_has_dcc(image) || radv_image_has_cmask(image) || in radv_image_alloc_values()
1352 image->tc_compatible_cmask = radv_image_has_cmask(image) && in radv_image_create_layout()
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| H A D | radv_private.h | 1863 radv_image_has_cmask(const struct radv_image *image) in radv_image_has_cmask() function
1911 return radv_image_has_cmask(image) || in radv_image_has_CB_metadata()
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