Searched refs:runnerm1 (Results 1 – 5 of 5) sorted by relevance
| /dports/cad/verilator/verilator-4.216/test_regress/t/ |
| H A D | t_order_clkinst.v | 72 reg [31:0] runnerm1, runner; initial runner = 0; register
79 runnerm1 = runner - 32'd1;
82 always @ (/*AS*/runnerm1) begin
85 runner = runnerm1;
86 $write ("%m count=%d runner =%x\n",count, runnerm1);
101 reg [31:0] runnerm1, runner; initial runner = 0; register
108 runnerm1 = runner - 32'd1;
111 always @ (/*AS*/runnerm1) begin
114 runner <= runnerm1;
115 $write ("%m count=%d runner<=%x\n",count, runnerm1);
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| H A D | t_order_comboclkloop.v | 20 reg [31:0] runnerm1, runner; initial runner = 0; register
25 runnerm1 = runner - 32'd1;
28 always @ (/*AS*/runnerm1) begin
31 runner = runnerm1;
32 $write(" seq runcount=%0d runner =%0x\n", runcount, runnerm1);
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| H A D | t_order_comboloop.v | 18 reg [31:0] runnerm1; register
45 runnerm1 = runner - 32'd1;
48 always @ (/*AS*/runnerm1) begin
50 runner = runnerm1;
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| H A D | t_order_clkinst_bad.out | 16 72 | reg [31:0] runnerm1, runner; initial runner = 0;
19 101 | reg [31:0] runnerm1, runner; initial runner = 0;
22 72 | reg [31:0] runnerm1, runner; initial runner = 0;
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| H A D | t_order_clkinst.out | 20 $var wire 32 ) runnerm1 [31:0] $end
26 $var wire 32 - runnerm1 [31:0] $end
32 $var wire 32 + runnerm1 [31:0] $end
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