Searched refs:sla32 (Results 1 – 5 of 5) sorted by relevance
/dports/emulators/mess/mame-mame0226/src/devices/cpu/tlcs900/ |
H A D | tlcs900.h | 246 uint32_t sla32( uint32_t a, uint8_t s );
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H A D | 900tbl.hxx | 1009 uint32_t tlcs900_device::sla32( uint32_t a, uint8_t s ) in sla32() function in tlcs900_device 3424 *m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l ); in op_SLALIR() 3430 *m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 ); in op_SLALRR() 3472 *m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l ); in op_SLLLIR() 3478 *m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 ); in op_SLLLRR()
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/tlcs900/ |
H A D | tlcs900.h | 246 uint32_t sla32( uint32_t a, uint8_t s );
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H A D | 900tbl.hxx | 1009 uint32_t tlcs900_device::sla32( uint32_t a, uint8_t s ) in sla32() function in tlcs900_device 3424 *m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l ); in op_SLALIR() 3430 *m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 ); in op_SLALRR() 3472 *m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l ); in op_SLLLIR() 3478 *m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 ); in op_SLLLRR()
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/dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/tlcs900/ |
H A D | 900tbl.c | 996 INLINE UINT32 sla32( tlcs900_state *cpustate, UINT32 a, UINT8 s ) in sla32() function 3407 *cpustate->p2_reg32 = sla32( cpustate, *cpustate->p2_reg32, cpustate->imm1.b.l ); in _SLALIR() 3413 *cpustate->p2_reg32 = sla32( cpustate, *cpustate->p2_reg32, *cpustate->p1_reg8 ); in _SLALRR() 3455 *cpustate->p2_reg32 = sla32( cpustate, *cpustate->p2_reg32, cpustate->imm1.b.l ); in _SLLLIR() 3461 *cpustate->p2_reg32 = sla32( cpustate, *cpustate->p2_reg32, *cpustate->p1_reg8 ); in _SLLLRR()
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