| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| H A D | brw_nir_lower_rt_intrinsics.c | 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| /dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| H A D | brw_nir_lower_rt_intrinsics.c | 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| /dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| H A D | brw_nir_lower_rt_intrinsics.c | 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| H A D | brw_nir_lower_rt_intrinsics.c | 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| H A D | brw_nir_lower_rt_intrinsics.c | 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
| H A D | brw_rt.h | 96 uint32_t sw_stack_size; member
197 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
225 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
226 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_rt_builder.h | 200 nir_ssa_def *sw_stack_size; member
234 defs->sw_stack_size = nir_channel(b, data, 12); in brw_nir_rt_load_globals()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
| H A D | brw_rt.h | 99 uint32_t sw_stack_size; member
204 uint32_t sw_stack_size) in brw_rt_compute_scratch_layout() argument
232 layout->sw_stack_size = ALIGN(sw_stack_size, 64); in brw_rt_compute_scratch_layout()
233 size += num_stack_ids * layout->sw_stack_size; in brw_rt_compute_scratch_layout()
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| H A D | brw_nir_lower_rt_intrinsics.c | 271 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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