| /dports/editors/ted/Ted-2.23/Ted/ |
| H A D | tedBottomRuler.c | 41 TedBottomRuler * tbr; in tedMakeBottomRuler() local
48 if ( ! tbr ) in tedMakeBottomRuler()
57 tbr->tbrPage= -1; in tedMakeBottomRuler()
58 tbr->tbrPages= 0; in tedMakeBottomRuler()
59 tbr->tbrSection= -1; in tedMakeBottomRuler()
60 tbr->tbrSections= 0; in tedMakeBottomRuler()
83 { LXDEB(l,tbr->tbrPageString); free( tbr ); return (void *)0; } in tedMakeBottomRuler()
87 return (void *)tbr; in tedMakeBottomRuler()
109 free( tbr ); in tedFreeBottomRuler()
167 tbr->tbrPageStringLength= to- tbr->tbrPageString; in tedRulerFormatPageNumber()
[all …]
|
| /dports/www/gitea/gitea-1.16.5/vendor/github.com/mholt/archiver/v3/ |
| H A D | tarbrotli.go | 32 err := tbr.CheckExt(destination)
36 tbr.wrapWriter()
44 tbr.wrapReader()
50 tbr.wrapReader()
51 return tbr.Tar.Walk(archive, walkFn)
57 tbr.wrapWriter()
58 return tbr.Tar.Create(out)
64 tbr.wrapReader()
65 return tbr.Tar.Open(in, size)
72 tbr.wrapReader()
[all …]
|
| /dports/www/mattermost-server/mattermost-server-6.0.2/vendor/github.com/mholt/archiver/v3/ |
| H A D | tarbrotli.go | 32 err := tbr.CheckExt(destination)
36 tbr.wrapWriter()
44 tbr.wrapReader()
50 tbr.wrapReader()
51 return tbr.Tar.Walk(archive, walkFn)
57 tbr.wrapWriter()
58 return tbr.Tar.Create(out)
64 tbr.wrapReader()
65 return tbr.Tar.Open(in, size)
72 tbr.wrapReader()
[all …]
|
| /dports/devel/log4cxx/apache-log4cxx-0.11.0/src/test/resources/witness/rolling/ |
| H A D | Makefile.am | 24 tbr-test1.0 \
25 tbr-test1.1 \
26 tbr-test1.2 \
27 tbr-test1.3 \
28 tbr-test2.0 \
29 tbr-test2.1 \
30 tbr-test2.2 \
31 tbr-test2.3 \
32 tbr-test3.3 \
33 tbr-test4.0 \
[all …]
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/ |
| H A D | ftno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 ftno ; should branch to tbr + (128 + 4)*16
23 ftno ; should branch to tbr + (128 + 4)*16
25 ftno ; should branch to tbr + (128 + 4)*16
27 ftno ; should branch to tbr + (128 + 4)*16
29 ftno ; should branch to tbr + (128 + 4)*16
31 ftno ; should branch to tbr + (128 + 4)*16
33 ftno ; should branch to tbr + (128 + 4)*16
35 ftno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 ftino ; should branch to tbr + (128 + 4)*16
22 ftino ; should branch to tbr + (128 + 4)*16
24 ftino ; should branch to tbr + (128 + 4)*16
26 ftino ; should branch to tbr + (128 + 4)*16
28 ftino ; should branch to tbr + (128 + 4)*16
30 ftino ; should branch to tbr + (128 + 4)*16
32 ftino ; should branch to tbr + (128 + 4)*16
34 ftino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 tino ; should branch to tbr + (128 + 4)*16
22 tino ; should branch to tbr + (128 + 4)*16
24 tino ; should branch to tbr + (128 + 4)*16
26 tino ; should branch to tbr + (128 + 4)*16
28 tino ; should branch to tbr + (128 + 4)*16
30 tino ; should branch to tbr + (128 + 4)*16
32 tino ; should branch to tbr + (128 + 4)*16
34 tino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tno ; should branch to tbr + (128 + 4)*16
23 tno ; should branch to tbr + (128 + 4)*16
25 tno ; should branch to tbr + (128 + 4)*16
27 tno ; should branch to tbr + (128 + 4)*16
29 tno ; should branch to tbr + (128 + 4)*16
31 tno ; should branch to tbr + (128 + 4)*16
33 tno ; should branch to tbr + (128 + 4)*16
35 tno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tigt.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
27 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
32 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
36 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
40 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
44 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
48 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
52 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tihi.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
26 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
31 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
36 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
40 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
44 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
48 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
52 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/ |
| H A D | tino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 tino ; should branch to tbr + (128 + 4)*16
22 tino ; should branch to tbr + (128 + 4)*16
24 tino ; should branch to tbr + (128 + 4)*16
26 tino ; should branch to tbr + (128 + 4)*16
28 tino ; should branch to tbr + (128 + 4)*16
30 tino ; should branch to tbr + (128 + 4)*16
32 tino ; should branch to tbr + (128 + 4)*16
34 tino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tno ; should branch to tbr + (128 + 4)*16
23 tno ; should branch to tbr + (128 + 4)*16
25 tno ; should branch to tbr + (128 + 4)*16
27 tno ; should branch to tbr + (128 + 4)*16
29 tno ; should branch to tbr + (128 + 4)*16
31 tno ; should branch to tbr + (128 + 4)*16
33 tno ; should branch to tbr + (128 + 4)*16
35 tno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 ftino ; should branch to tbr + (128 + 4)*16
22 ftino ; should branch to tbr + (128 + 4)*16
24 ftino ; should branch to tbr + (128 + 4)*16
26 ftino ; should branch to tbr + (128 + 4)*16
28 ftino ; should branch to tbr + (128 + 4)*16
30 ftino ; should branch to tbr + (128 + 4)*16
32 ftino ; should branch to tbr + (128 + 4)*16
34 ftino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 ftno ; should branch to tbr + (128 + 4)*16
23 ftno ; should branch to tbr + (128 + 4)*16
25 ftno ; should branch to tbr + (128 + 4)*16
27 ftno ; should branch to tbr + (128 + 4)*16
29 ftno ; should branch to tbr + (128 + 4)*16
31 ftno ; should branch to tbr + (128 + 4)*16
33 ftno ; should branch to tbr + (128 + 4)*16
35 ftno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tigt.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
27 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
32 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
36 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
40 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
44 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
48 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
52 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tihi.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
26 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
31 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
36 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
40 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
44 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
48 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
52 tihi icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/frv/ |
| H A D | tino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 tino ; should branch to tbr + (128 + 4)*16
22 tino ; should branch to tbr + (128 + 4)*16
24 tino ; should branch to tbr + (128 + 4)*16
26 tino ; should branch to tbr + (128 + 4)*16
28 tino ; should branch to tbr + (128 + 4)*16
30 tino ; should branch to tbr + (128 + 4)*16
32 tino ; should branch to tbr + (128 + 4)*16
34 tino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 ftino ; should branch to tbr + (128 + 4)*16
22 ftino ; should branch to tbr + (128 + 4)*16
24 ftino ; should branch to tbr + (128 + 4)*16
26 ftino ; should branch to tbr + (128 + 4)*16
28 ftino ; should branch to tbr + (128 + 4)*16
30 ftino ; should branch to tbr + (128 + 4)*16
32 ftino ; should branch to tbr + (128 + 4)*16
34 ftino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tno ; should branch to tbr + (128 + 4)*16
23 tno ; should branch to tbr + (128 + 4)*16
25 tno ; should branch to tbr + (128 + 4)*16
27 tno ; should branch to tbr + (128 + 4)*16
29 tno ; should branch to tbr + (128 + 4)*16
31 tno ; should branch to tbr + (128 + 4)*16
33 tno ; should branch to tbr + (128 + 4)*16
35 tno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 ftno ; should branch to tbr + (128 + 4)*16
23 ftno ; should branch to tbr + (128 + 4)*16
25 ftno ; should branch to tbr + (128 + 4)*16
27 ftno ; should branch to tbr + (128 + 4)*16
29 ftno ; should branch to tbr + (128 + 4)*16
31 ftno ; should branch to tbr + (128 + 4)*16
33 ftno ; should branch to tbr + (128 + 4)*16
35 ftno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tigt.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
27 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
32 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
36 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
40 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
44 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
48 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
52 tigt icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
|
| /dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/frv/ |
| H A D | ftno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 ftno ; should branch to tbr + (128 + 4)*16
23 ftno ; should branch to tbr + (128 + 4)*16
25 ftno ; should branch to tbr + (128 + 4)*16
27 ftno ; should branch to tbr + (128 + 4)*16
29 ftno ; should branch to tbr + (128 + 4)*16
31 ftno ; should branch to tbr + (128 + 4)*16
33 ftno ; should branch to tbr + (128 + 4)*16
35 ftno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | ftino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 ftino ; should branch to tbr + (128 + 4)*16
22 ftino ; should branch to tbr + (128 + 4)*16
24 ftino ; should branch to tbr + (128 + 4)*16
26 ftino ; should branch to tbr + (128 + 4)*16
28 ftino ; should branch to tbr + (128 + 4)*16
30 ftino ; should branch to tbr + (128 + 4)*16
32 ftino ; should branch to tbr + (128 + 4)*16
34 ftino ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tno.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
21 tno ; should branch to tbr + (128 + 4)*16
23 tno ; should branch to tbr + (128 + 4)*16
25 tno ; should branch to tbr + (128 + 4)*16
27 tno ; should branch to tbr + (128 + 4)*16
29 tno ; should branch to tbr + (128 + 4)*16
31 tno ; should branch to tbr + (128 + 4)*16
33 tno ; should branch to tbr + (128 + 4)*16
35 tno ; should branch to tbr + (128 + 4)*16
[all …]
|
| H A D | tino.cgs | 10 and_spr_immed -4081,tbr ; clear tbr.tt
11 set_gr_spr tbr,gr7
20 tino ; should branch to tbr + (128 + 4)*16
22 tino ; should branch to tbr + (128 + 4)*16
24 tino ; should branch to tbr + (128 + 4)*16
26 tino ; should branch to tbr + (128 + 4)*16
28 tino ; should branch to tbr + (128 + 4)*16
30 tino ; should branch to tbr + (128 + 4)*16
32 tino ; should branch to tbr + (128 + 4)*16
34 tino ; should branch to tbr + (128 + 4)*16
[all …]
|