1# frv testcase for tino
2# mach: all
3
4	.include "testutils.inc"
5
6	start
7
8	.global tinev
9tinev:
10	and_spr_immed	-4081,tbr		; clear tbr.tt
11	set_gr_spr	tbr,gr7
12	inc_gr_immed	2112,gr7		; address of exception handler
13	set_mem_limmed	0x0038,0x2000,gr7	; bctrlr 0,0
14
15	set_spr_immed	128,lcr
16	set_spr_addr	bad,lr
17	set_gr_immed	0,gr7
18
19	set_icc		0x0 0
20	tino 			; should branch to tbr + (128 + 4)*16
21	set_icc		0x1 0
22	tino 			; should branch to tbr + (128 + 4)*16
23	set_icc		0x2 0
24	tino 			; should branch to tbr + (128 + 4)*16
25	set_icc		0x3 0
26	tino 			; should branch to tbr + (128 + 4)*16
27	set_icc		0x4 0
28	tino 			; should branch to tbr + (128 + 4)*16
29	set_icc		0x5 0
30	tino 			; should branch to tbr + (128 + 4)*16
31	set_icc		0x6 0
32	tino 			; should branch to tbr + (128 + 4)*16
33	set_icc		0x7 0
34	tino 			; should branch to tbr + (128 + 4)*16
35	set_icc		0x8 0
36	tino 			; should branch to tbr + (128 + 4)*16
37	set_icc		0x9 0
38	tino 			; should branch to tbr + (128 + 4)*16
39	set_icc		0xa 0
40	tino 			; should branch to tbr + (128 + 4)*16
41	set_icc		0xb 0
42	tino 			; should branch to tbr + (128 + 4)*16
43	set_icc		0xc 0
44	tino 			; should branch to tbr + (128 + 4)*16
45	set_icc		0xd 0
46	tino 			; should branch to tbr + (128 + 4)*16
47	set_icc		0xe 0
48	tino 			; should branch to tbr + (128 + 4)*16
49	set_icc		0xf 0
50	tino 			; should branch to tbr + (128 + 4)*16
51	pass
52bad:
53	fail
54