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/dports/graphics/gimp-app/gimp-2.10.30/app/core/
H A Dgimpsymmetry-tiling.c200 if (tiling->interval_x <= tiling->shift + G_DOUBLE_EPSILON) in gimp_tiling_set_property()
241 (tiling->interval_y != 0.0 && new_shift < tiling->interval_x)) in gimp_tiling_set_property()
382 if (origin->x > 0 && tiling->max_x == 0 && tiling->interval_x >= 1.0) in gimp_tiling_update_strokes()
383 startx = fmod (origin->x, tiling->interval_x) - tiling->interval_x; in gimp_tiling_update_strokes()
385 if (origin->y > 0 && tiling->max_y == 0 && tiling->interval_y >= 1.0) in gimp_tiling_update_strokes()
387 starty = fmod (origin->y, tiling->interval_y) - tiling->interval_y; in gimp_tiling_update_strokes()
390 startx -= tiling->shift * floor (origin->y / tiling->interval_y + 1); in gimp_tiling_update_strokes()
396 if (tiling->max_y && y_count >= tiling->max_y) in gimp_tiling_update_strokes()
402 if (tiling->max_x && x_count >= tiling->max_x) in gimp_tiling_update_strokes()
414 if (tiling->max_x || startx + tiling->shift <= 0.0) in gimp_tiling_update_strokes()
[all …]
/dports/print/texlive-base/texlive-20150521-source/utils/asymptote/base/
H A Dpatterns.asy5 frame tiling;
16 add(tiling,f);
20 return tiling;
33 picture tiling;
40 return tiling;
45 picture tiling;
51 return tiling;
56 picture tiling;
63 return tiling;
92 return tiling;
[all …]
/dports/math/asymptote/asymptote-2.67/base/
H A Dpatterns.asy5 frame tiling;
16 add(tiling,f);
20 return tiling;
33 picture tiling;
40 return tiling;
45 picture tiling;
51 return tiling;
56 picture tiling;
63 return tiling;
92 return tiling;
[all …]
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/
H A Dintel_memory.c147 if (tiling) { in intel_check_display_stride()
211 *tiling = I915_TILING_NONE; in intel_compute_size()
228 *tiling = I915_TILING_NONE; in intel_compute_size()
234 *tiling = I915_TILING_NONE; in intel_compute_size()
249 *tiling); in intel_compute_size()
260 *tiling = I915_TILING_NONE; in intel_compute_size()
284 uint32_t tiling; in intel_allocate_framebuffer() local
291 tiling = I915_TILING_X; in intel_allocate_framebuffer()
293 tiling = I915_TILING_NONE; in intel_allocate_framebuffer()
302 tiling = I915_TILING_NONE; in intel_allocate_framebuffer()
[all …]
/dports/graphics/netpbm/netpbm-10.91.01/converter/other/fiasco/codec/
H A Dtiling.c110 return tiling; in alloc_tiling()
114 free_tiling (tiling_t *tiling) in free_tiling() argument
125 if (tiling->vorder) in free_tiling()
126 Free (tiling->vorder); in free_tiling()
127 Free (tiling); in free_tiling()
151 if (tiling->exponent) in perform_tiling()
211 number, tiling->vorder [address]); in perform_tiling()
214 tiling->vorder [address] = -1; in perform_tiling()
222 tiling->exponent, in perform_tiling()
223 tiling->method == FIASCO_TILING_SPIRAL_ASC); in perform_tiling()
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/cc/tiles/
H A Dpicture_layer_tiling_set.cc132 for (const auto& tiling : tilings_) { in UpdateTilingsToCurrentRasterSourceForActivation() local
192 for (const auto& tiling : tilings_) { in Invalidate() local
203 DCHECK(tiling->tile_size() == in VerifyTilings()
249 to_remove.push_back(tiling.get()); in CleanUpTilings()
252 for (auto* tiling : to_remove) { in CleanUpTilings() local
254 Remove(tiling); in CleanUpTilings()
265 for (const auto& tiling : tilings_) in MarkAllTilingsNonIdeal() local
543 tiling->ComputeTilePriorityRects( in UpdateTilePriorities()
553 for (const auto& tiling : tilings_) in GetAllPrioritizedTilesForTracing() local
621 DCHECK(tiling); in resolution()
[all …]
H A Dtiling_set_raster_queue_all.cc49 high_res_tiling = tiling; in TilingSetRasterQueueAll()
51 low_res_tiling = tiling; in TilingSetRasterQueueAll()
111 iterators_[type] = TilingIterator(tiling, &tiling->tiling_data_); in MakeTilingIterator()
113 tiling->set_all_tiles_done(true); in MakeTilingIterator()
165 PictureLayerTiling* tiling, in OnePriorityRectIterator() argument
168 : tiling_(tiling), in OnePriorityRectIterator()
236 PictureLayerTiling* tiling, in VisibleTilingIterator() argument
283 PictureLayerTiling* tiling, in SkewportTilingIterator() argument
310 PictureLayerTiling* tiling, in SoonBorderTilingIterator() argument
337 PictureLayerTiling* tiling, in EventuallyTilingIterator() argument
[all …]
/dports/biology/p5-BioPerl/BioPerl-1.7.7/t/SearchIO/
H A DTiling.t19 my ($blio, $result, $hit, $tiling, $hsp);
161 ok($tiling = Bio::Search::Tiling::MapTiling->new($hit), 'create tiling');
177 $tiling->identities('query', 'est'),
185 $tiling->conserved('query', 'est'),
186 $tiling->conserved('query', 'max'),
196 # tiling iterator regression tests
203 $tiling->rewind('subject');
270 diag("New tiling tests") if $VERBOSE;
293 my @hsps = $tiling->hsps;
406 $a = $tiling->frac(-type=>$type,
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/cc/tiles/
H A Dpicture_layer_tiling_set.cc138 for (const auto& tiling : tilings_) { in UpdateTilingsToCurrentRasterSourceForActivation() local
198 for (const auto& tiling : tilings_) { in Invalidate() local
209 DCHECK(tiling->tile_size() == in VerifyTilings()
255 to_remove.push_back(tiling.get()); in CleanUpTilings()
258 for (auto* tiling : to_remove) { in CleanUpTilings() local
260 Remove(tiling); in CleanUpTilings()
271 for (const auto& tiling : tilings_) in MarkAllTilingsNonIdeal() local
551 tiling->ComputeTilePriorityRects( in UpdateTilePriorities()
561 for (const auto& tiling : tilings_) in GetAllPrioritizedTilesForTracing() local
629 DCHECK(tiling); in resolution()
[all …]
H A Dtiling_set_raster_queue_all.cc49 high_res_tiling = tiling; in TilingSetRasterQueueAll()
51 low_res_tiling = tiling; in TilingSetRasterQueueAll()
111 iterators_[type] = TilingIterator(tiling, &tiling->tiling_data_); in MakeTilingIterator()
113 tiling->set_all_tiles_done(true); in MakeTilingIterator()
165 PictureLayerTiling* tiling, in OnePriorityRectIterator() argument
168 : tiling_(tiling), in OnePriorityRectIterator()
236 PictureLayerTiling* tiling, in VisibleTilingIterator() argument
283 PictureLayerTiling* tiling, in SkewportTilingIterator() argument
310 PictureLayerTiling* tiling, in SoonBorderTilingIterator() argument
337 PictureLayerTiling* tiling, in EventuallyTilingIterator() argument
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/dports/graphics/ossim/ossim-OrchidIsland-2.11.1/share/ossim/templates/
H A Dorthoigen_srtm.kwl7 // based on the tiling parameters.
12 // 30 meter tiling for SRTM output
14 igen.tiling.type: ossimTiling
15 igen.tiling.tiling_distance: 1 1
16 igen.tiling.tiling_distance_type: degrees
18 //igen.tiling.delta: 10801 10801
20 igen.tiling.delta: 3601 3601
23 //igen.tiling.delta: 1201 1201
25 igen.tiling.delta_type: total_pixels
26 igen.tiling.tile_name_mask: %SRTM%
[all …]
/dports/lang/clover/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/isl/
H A Disl_drm.c35 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
37 switch (tiling) { in isl_tiling_to_i915_tiling()
62 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
64 switch (tiling) { in isl_tiling_from_i915_tiling()
84 .tiling = ISL_TILING_LINEAR,
89 .tiling = ISL_TILING_X,
94 .tiling = ISL_TILING_Y0,
99 .tiling = ISL_TILING_Y0,
106 .tiling = ISL_TILING_Y0,
113 .tiling = ISL_TILING_Y0,
[all …]
/dports/lang/clover/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Dintel_regions.c73 region->tiling = tiling; in intel_region_alloc_internal()
81 uint32_t tiling, in intel_region_alloc() argument
95 &tiling, &aligned_pitch, flags); in intel_region_alloc()
131 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_handle() local
145 width, height, pitch, tiling, buffer); in intel_region_alloc_for_handle()
166 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_fd() local
180 width, height, pitch, tiling, buffer); in intel_region_alloc_for_fd()
238 uint32_t tiling = region->tiling; in intel_region_get_tile_masks() local
240 switch (tiling) { in intel_region_get_tile_masks()
268 uint32_t tiling = region->tiling; in intel_region_get_aligned_offset() local
[all …]
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Dintel_regions.c73 region->tiling = tiling; in intel_region_alloc_internal()
81 uint32_t tiling, in intel_region_alloc() argument
95 &tiling, &aligned_pitch, flags); in intel_region_alloc()
131 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_handle() local
145 width, height, pitch, tiling, buffer); in intel_region_alloc_for_handle()
166 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_fd() local
180 width, height, pitch, tiling, buffer); in intel_region_alloc_for_fd()
238 uint32_t tiling = region->tiling; in intel_region_get_tile_masks() local
240 switch (tiling) { in intel_region_get_tile_masks()
268 uint32_t tiling = region->tiling; in intel_region_get_aligned_offset() local
[all …]
/dports/graphics/libosmesa/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Dintel_regions.c73 region->tiling = tiling; in intel_region_alloc_internal()
81 uint32_t tiling, in intel_region_alloc() argument
95 &tiling, &aligned_pitch, flags); in intel_region_alloc()
131 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_handle() local
145 width, height, pitch, tiling, buffer); in intel_region_alloc_for_handle()
166 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_fd() local
180 width, height, pitch, tiling, buffer); in intel_region_alloc_for_fd()
238 uint32_t tiling = region->tiling; in intel_region_get_tile_masks() local
240 switch (tiling) { in intel_region_get_tile_masks()
268 uint32_t tiling = region->tiling; in intel_region_get_aligned_offset() local
[all …]
/dports/graphics/mesa-libs/mesa-21.3.6/src/mesa/drivers/dri/i915/
H A Dintel_regions.c73 region->tiling = tiling; in intel_region_alloc_internal()
81 uint32_t tiling, in intel_region_alloc() argument
95 &tiling, &aligned_pitch, flags); in intel_region_alloc()
131 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_handle() local
145 width, height, pitch, tiling, buffer); in intel_region_alloc_for_handle()
166 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_fd() local
180 width, height, pitch, tiling, buffer); in intel_region_alloc_for_fd()
238 uint32_t tiling = region->tiling; in intel_region_get_tile_masks() local
240 switch (tiling) { in intel_region_get_tile_masks()
268 uint32_t tiling = region->tiling; in intel_region_get_aligned_offset() local
[all …]

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