| /dports/emulators/qemu42/qemu-4.2.1/hw/lm32/ |
| H A D | lm32_boards.c | 96 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
129 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
183 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
222 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
257 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/lm32/ |
| H A D | lm32_boards.c | 96 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
129 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
183 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
222 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
257 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/lm32/ |
| H A D | lm32_boards.c | 97 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
130 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
183 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
222 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
256 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/emulators/qemu60/qemu-6.0.0/hw/lm32/ |
| H A D | lm32_boards.c | 103 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
134 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
194 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
231 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
266 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/ |
| H A D | timer-sp804.c | 255 void __iomem *timer1_base; in sp804_of_init() local
266 timer1_base = base + timer->timer_base[0]; in sp804_of_init()
270 writel(0, timer1_base + timer->ctrl); in sp804_of_init()
306 ret = sp804_clocksource_and_sched_clock_init(timer1_base, in sp804_of_init()
312 ret = sp804_clockevents_init(timer1_base, irq, clk1, name); in sp804_of_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/ |
| H A D | timer-sp804.c | 255 void __iomem *timer1_base; in sp804_of_init() local
266 timer1_base = base + timer->timer_base[0]; in sp804_of_init()
270 writel(0, timer1_base + timer->ctrl); in sp804_of_init()
306 ret = sp804_clocksource_and_sched_clock_init(timer1_base, in sp804_of_init()
312 ret = sp804_clockevents_init(timer1_base, irq, clk1, name); in sp804_of_init()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/ |
| H A D | timer-sp804.c | 255 void __iomem *timer1_base; in sp804_of_init() local
266 timer1_base = base + timer->timer_base[0]; in sp804_of_init()
270 writel(0, timer1_base + timer->ctrl); in sp804_of_init()
306 ret = sp804_clocksource_and_sched_clock_init(timer1_base, in sp804_of_init()
312 ret = sp804_clockevents_init(timer1_base, irq, clk1, name); in sp804_of_init()
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| /dports/emulators/qemu5/qemu-5.2.0/hw/lm32/ |
| H A D | lm32_boards.c | 103 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
134 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
194 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
231 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
266 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/lm32/ |
| H A D | lm32_boards.c | 103 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
134 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
194 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
231 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
266 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/lm32/ |
| H A D | lm32_boards.c | 103 hwaddr timer1_base = 0x8000a000; in lm32_evr_init() local
134 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_evr_init()
194 hwaddr timer1_base = 0x80010000; in lm32_uclinux_init() local
231 sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]); in lm32_uclinux_init()
266 hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); in lm32_uclinux_init()
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